llvm-mirror/test/MC/Disassembler/ARM/invalid-t2LDRBT-thumb.txt

# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}

# Opcode=1922 Name=t2LDRBT Format=ARM_FORMAT_THUMBFRM(25)
#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 1: 0: 0: 0| 0: 0: 0: 1| 0: 0: 0: 0| 1: 1: 1: 1| 1: 1: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1|
# -------------------------------------------------------------------------------------------------
#
# The unpriviledged Load/Store cannot have SP or PC as Rt.
0x10 0xf8 0x3 0xfe
The LDRT/STRT (unpriviledged load/store) operations don't take SP or PC as Rt. rdar://problem/9279440 llvm-svn: 129469 2011-04-13 23:04:32 +02:00			`# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 \|& grep {invalid instruction encoding}`

			`# Opcode=1922 Name=t2LDRBT Format=ARM_FORMAT_THUMBFRM(25)`
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144 2011-08-09 22:55:18 +02:00			`# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0`
The LDRT/STRT (unpriviledged load/store) operations don't take SP or PC as Rt. rdar://problem/9279440 llvm-svn: 129469 2011-04-13 23:04:32 +02:00			`# -------------------------------------------------------------------------------------------------`
			`# \| 1: 1: 1: 1\| 1: 0: 0: 0\| 0: 0: 0: 1\| 0: 0: 0: 0\| 1: 1: 1: 1\| 1: 1: 1: 0\| 0: 0: 0: 0\| 0: 0: 1: 1\|`
			`# -------------------------------------------------------------------------------------------------`
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144 2011-08-09 22:55:18 +02:00			`#`
The LDRT/STRT (unpriviledged load/store) operations don't take SP or PC as Rt. rdar://problem/9279440 llvm-svn: 129469 2011-04-13 23:04:32 +02:00			`# The unpriviledged Load/Store cannot have SP or PC as Rt.`
			`0x10 0xf8 0x3 0xfe`