llvm-mirror/test/CodeGen/X86/vec_set-A.ll

; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep {movl.*\$1, %}
define <2 x i64> @test1() nounwind {
entry:
	ret <2 x i64> < i64 1, i64 0 >
}
These tests don't work unless SSE2 is active. Judging from the checking comments this is intentional, so add the flag (makes them pass on non-x86 host). llvm-svn: 48157 2008-03-10 18:33:57 +01:00			`; RUN: llvm-as < %s \| llc -march=x86 -mattr=+sse2 \| grep {movl.*\$1, %}`
Add nounwind. llvm-svn: 50837 2008-05-08 00:59:08 +02:00			`define <2 x i64> @test1() nounwind {`
Implement a readme entry, compiling #include <xmmintrin.h> __m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} into: movl $1, %eax movd %eax, %xmm0 ret instead of a constant pool load. llvm-svn: 48063 2008-03-09 02:05:04 +01:00			`entry:`
			`ret <2 x i64> < i64 1, i64 0 >`
			`}`