2018-03-08 14:05:02 +01:00
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//===-- llvm-mca.cpp - Machine Code Analyzer -------------------*- C++ -* -===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This utility is a simple driver that allows static performance analysis on
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// machine code similarly to how IACA (Intel Architecture Code Analyzer) works.
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//
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// llvm-mca [options] <file-name>
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// -march <type>
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// -mcpu <cpu>
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// -o <file>
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//
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// The target defaults to the host target.
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// The cpu defaults to 'generic'.
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// The output defaults to standard output.
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//
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//===----------------------------------------------------------------------===//
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2018-03-09 13:50:42 +01:00
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#include "BackendPrinter.h"
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2018-04-09 18:39:52 +02:00
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#include "CodeRegion.h"
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2018-04-10 16:55:14 +02:00
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#include "DispatchStatistics.h"
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2018-03-23 20:40:04 +01:00
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#include "InstructionInfoView.h"
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2018-03-26 14:04:53 +02:00
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#include "InstructionTables.h"
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2018-04-03 18:46:23 +02:00
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#include "RegisterFileStatistics.h"
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2018-03-09 13:50:42 +01:00
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#include "ResourcePressureView.h"
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2018-04-11 14:12:53 +02:00
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#include "RetireControlUnitStatistics.h"
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2018-04-11 13:37:46 +02:00
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#include "SchedulerStatistics.h"
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2018-03-09 14:52:03 +01:00
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#include "SummaryView.h"
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2018-03-09 13:50:42 +01:00
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#include "TimelineView.h"
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2018-03-08 14:05:02 +01:00
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCObjectFileInfo.h"
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#include "llvm/MC/MCParser/MCTargetAsmParser.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/Support/CommandLine.h"
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2018-03-08 17:08:43 +01:00
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#include "llvm/Support/ErrorOr.h"
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#include "llvm/Support/FileSystem.h"
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2018-04-13 20:26:06 +02:00
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#include "llvm/Support/InitLLVM.h"
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2018-03-08 14:05:02 +01:00
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#include "llvm/Support/MemoryBuffer.h"
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#include "llvm/Support/SourceMgr.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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2018-03-08 17:08:43 +01:00
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#include "llvm/Support/ToolOutputFile.h"
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2018-03-08 14:05:02 +01:00
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using namespace llvm;
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static cl::opt<std::string>
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InputFilename(cl::Positional, cl::desc("<input file>"), cl::init("-"));
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static cl::opt<std::string> OutputFilename("o", cl::desc("Output filename"),
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cl::init("-"),
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cl::value_desc("filename"));
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static cl::opt<std::string>
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ArchName("march", cl::desc("Target arch to assemble for, "
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"see -version for available targets"));
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static cl::opt<std::string>
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TripleName("mtriple", cl::desc("Target triple to assemble for, "
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2018-03-08 17:08:43 +01:00
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"see -version for available targets"));
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2018-03-08 14:05:02 +01:00
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static cl::opt<std::string>
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MCPU("mcpu",
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cl::desc("Target a specific cpu type (-mcpu=help for details)"),
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cl::value_desc("cpu-name"), cl::init("generic"));
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static cl::opt<unsigned>
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OutputAsmVariant("output-asm-variant",
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cl::desc("Syntax variant to use for output printing"));
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static cl::opt<unsigned> Iterations("iterations",
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cl::desc("Number of iterations to run"),
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cl::init(0));
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static cl::opt<unsigned> DispatchWidth(
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"dispatch",
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cl::desc("Dispatch Width. By default it is set equal to IssueWidth"),
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cl::init(0));
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static cl::opt<unsigned>
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RegisterFileSize("register-file-size",
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cl::desc("Maximum number of temporary registers which can "
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"be used for register mappings"),
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cl::init(0));
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2018-04-03 18:46:23 +02:00
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static cl::opt<bool>
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PrintRegisterFileStats("register-file-stats",
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cl::desc("Print register file statistics"),
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cl::init(false));
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2018-04-10 16:55:14 +02:00
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static cl::opt<bool>
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PrintDispatchStats("dispatch-stats",
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cl::desc("Print dispatch statistics"),
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cl::init(false));
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2018-04-11 13:37:46 +02:00
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static cl::opt<bool>
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2018-04-11 14:12:53 +02:00
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PrintSchedulerStats("scheduler-stats",
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2018-04-11 13:37:46 +02:00
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cl::desc("Print scheduler statistics"),
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cl::init(false));
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2018-04-11 14:12:53 +02:00
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static cl::opt<bool>
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PrintRetireStats("retire-stats",
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cl::desc("Print retire control unit statistics"),
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cl::init(false));
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2018-03-23 12:33:09 +01:00
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static cl::opt<bool>
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PrintResourcePressureView("resource-pressure",
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cl::desc("Print the resource pressure view"),
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cl::init(true));
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2018-03-08 14:05:02 +01:00
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static cl::opt<bool> PrintTimelineView("timeline",
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cl::desc("Print the timeline view"),
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cl::init(false));
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static cl::opt<unsigned> TimelineMaxIterations(
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"timeline-max-iterations",
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cl::desc("Maximum number of iterations to print in timeline view"),
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cl::init(0));
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static cl::opt<unsigned> TimelineMaxCycles(
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"timeline-max-cycles",
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cl::desc(
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"Maximum number of cycles in the timeline view. Defaults to 80 cycles"),
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cl::init(80));
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static cl::opt<bool> PrintModeVerbose("verbose",
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cl::desc("Enable verbose output"),
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cl::init(false));
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2018-03-08 17:08:43 +01:00
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static cl::opt<bool> AssumeNoAlias(
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"noalias",
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cl::desc("If set, it assumes that loads and stores do not alias"),
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cl::init(true));
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2018-03-08 14:05:02 +01:00
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static cl::opt<unsigned>
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LoadQueueSize("lqueue", cl::desc("Size of the load queue"), cl::init(0));
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2018-03-26 14:04:53 +02:00
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2018-03-08 14:05:02 +01:00
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static cl::opt<unsigned>
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StoreQueueSize("squeue", cl::desc("Size of the store queue"), cl::init(0));
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2018-03-26 14:04:53 +02:00
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static cl::opt<bool>
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PrintInstructionTables("instruction-tables",
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cl::desc("Print instruction tables"),
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cl::init(false));
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2018-03-26 15:44:54 +02:00
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static cl::opt<bool>
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PrintInstructionInfoView("instruction-info",
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cl::desc("Print the instruction info view"),
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cl::init(true));
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2018-04-08 17:10:19 +02:00
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namespace {
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const Target *getTarget(const char *ProgName) {
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2018-03-08 14:05:02 +01:00
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TripleName = Triple::normalize(TripleName);
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if (TripleName.empty())
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TripleName = Triple::normalize(sys::getDefaultTargetTriple());
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Triple TheTriple(TripleName);
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// Get the target specific parser.
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std::string Error;
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const Target *TheTarget =
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TargetRegistry::lookupTarget(ArchName, TheTriple, Error);
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if (!TheTarget) {
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errs() << ProgName << ": " << Error;
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return nullptr;
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}
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// Return the found target.
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return TheTarget;
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}
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2018-04-09 18:39:52 +02:00
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// A comment consumer that parses strings.
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// The only valid tokens are strings.
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class MCACommentConsumer : public AsmCommentConsumer {
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public:
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mca::CodeRegions &Regions;
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MCACommentConsumer(mca::CodeRegions &R) : Regions(R) {}
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void HandleComment(SMLoc Loc, StringRef CommentText) override {
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// Skip empty comments.
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StringRef Comment(CommentText);
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if (Comment.empty())
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return;
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// Skip spaces and tabs
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unsigned Position = Comment.find_first_not_of(" \t");
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if (Position >= Comment.size())
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// we reached the end of the comment. Bail out.
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return;
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Comment = Comment.drop_front(Position);
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if (Comment.consume_front("LLVM-MCA-END")) {
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Regions.endRegion(Loc);
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return;
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}
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// Now try to parse string LLVM-MCA-BEGIN
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if (!Comment.consume_front("LLVM-MCA-BEGIN"))
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return;
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// Skip spaces and tabs
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Position = Comment.find_first_not_of(" \t");
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if (Position < Comment.size())
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2018-04-09 19:06:57 +02:00
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Comment = Comment.drop_front(Position);
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2018-04-09 18:39:52 +02:00
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// Use the rest of the string as a descriptor for this code snippet.
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Regions.beginRegion(Comment, Loc);
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}
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};
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2018-04-08 17:10:19 +02:00
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int AssembleInput(const char *ProgName, MCAsmParser &Parser,
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const Target *TheTarget, MCSubtargetInfo &STI,
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MCInstrInfo &MCII, MCTargetOptions &MCOptions) {
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2018-03-08 14:05:02 +01:00
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std::unique_ptr<MCTargetAsmParser> TAP(
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2018-04-08 17:10:19 +02:00
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TheTarget->createMCAsmParser(STI, Parser, MCII, MCOptions));
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2018-03-08 14:05:02 +01:00
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if (!TAP) {
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errs() << ProgName
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<< ": error: this target does not support assembly parsing.\n";
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return 1;
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}
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2018-04-08 17:10:19 +02:00
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Parser.setTargetParser(*TAP);
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return Parser.Run(false);
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2018-03-08 14:05:02 +01:00
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}
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2018-04-08 17:10:19 +02:00
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ErrorOr<std::unique_ptr<ToolOutputFile>> getOutputStream() {
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2018-03-08 17:08:43 +01:00
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if (OutputFilename == "")
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OutputFilename = "-";
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std::error_code EC;
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auto Out =
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llvm::make_unique<ToolOutputFile>(OutputFilename, EC, sys::fs::F_None);
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if (!EC)
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return std::move(Out);
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return EC;
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}
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2018-03-08 14:05:02 +01:00
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class MCStreamerWrapper final : public MCStreamer {
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2018-04-09 18:39:52 +02:00
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mca::CodeRegions &Regions;
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2018-03-08 14:05:02 +01:00
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public:
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2018-04-09 18:39:52 +02:00
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MCStreamerWrapper(MCContext &Context, mca::CodeRegions &R)
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: MCStreamer(Context), Regions(R) {}
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2018-03-08 14:05:02 +01:00
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// We only want to intercept the emission of new instructions.
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virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
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bool /* unused */) override {
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2018-04-09 18:39:52 +02:00
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Regions.addInstruction(llvm::make_unique<const MCInst>(Inst));
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2018-03-08 14:05:02 +01:00
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}
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bool EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) override {
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return true;
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}
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void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
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unsigned ByteAlignment) override {}
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void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
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uint64_t Size = 0, unsigned ByteAlignment = 0) override {}
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void EmitGPRel32Value(const MCExpr *Value) override {}
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void BeginCOFFSymbolDef(const MCSymbol *Symbol) override {}
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void EmitCOFFSymbolStorageClass(int StorageClass) override {}
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void EmitCOFFSymbolType(int Type) override {}
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void EndCOFFSymbolDef() override {}
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2018-04-09 18:39:52 +02:00
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const std::vector<std::unique_ptr<const MCInst>> &
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GetInstructionSequence(unsigned Index) const {
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return Regions.getInstructionSequence(Index);
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}
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2018-03-08 14:05:02 +01:00
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};
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} // end of anonymous namespace
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int main(int argc, char **argv) {
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2018-04-13 20:26:06 +02:00
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InitLLVM X(argc, argv);
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2018-03-08 14:05:02 +01:00
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// Initialize targets and assembly parsers.
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llvm::InitializeAllTargetInfos();
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llvm::InitializeAllTargetMCs();
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llvm::InitializeAllAsmParsers();
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// Enable printing of available targets when flag --version is specified.
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cl::AddExtraVersionPrinter(TargetRegistry::printRegisteredTargetsForVersion);
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// Parse flags and initialize target options.
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cl::ParseCommandLineOptions(argc, argv,
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"llvm machine code performance analyzer.\n");
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MCTargetOptions MCOptions;
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MCOptions.PreserveAsmComments = false;
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// Get the target from the triple. If a triple is not specified, then select
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// the default triple for the host. If the triple doesn't correspond to any
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// registered target, then exit with an error message.
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const char *ProgName = argv[0];
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const Target *TheTarget = getTarget(ProgName);
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if (!TheTarget)
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return 1;
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// GetTarget() may replaced TripleName with a default triple.
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// For safety, reconstruct the Triple object.
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Triple TheTriple(TripleName);
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ErrorOr<std::unique_ptr<MemoryBuffer>> BufferPtr =
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MemoryBuffer::getFileOrSTDIN(InputFilename);
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if (std::error_code EC = BufferPtr.getError()) {
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errs() << InputFilename << ": " << EC.message() << '\n';
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return 1;
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}
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SourceMgr SrcMgr;
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// Tell SrcMgr about this buffer, which is what the parser will pick up.
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SrcMgr.AddNewSourceBuffer(std::move(*BufferPtr), SMLoc());
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std::unique_ptr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
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assert(MRI && "Unable to create target register info!");
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std::unique_ptr<MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TripleName));
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assert(MAI && "Unable to create target asm info!");
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MCObjectFileInfo MOFI;
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MCContext Ctx(MAI.get(), MRI.get(), &MOFI, &SrcMgr);
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MOFI.InitMCObjectFileInfo(TheTriple, /* PIC= */ false, Ctx);
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std::unique_ptr<buffer_ostream> BOS;
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2018-03-26 14:04:53 +02:00
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2018-04-09 18:39:52 +02:00
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mca::CodeRegions Regions(SrcMgr);
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|
MCStreamerWrapper Str(Ctx, Regions);
|
2018-03-08 14:05:02 +01:00
|
|
|
|
|
|
|
std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo());
|
|
|
|
std::unique_ptr<MCSubtargetInfo> STI(
|
|
|
|
TheTarget->createMCSubtargetInfo(TripleName, MCPU, /* FeaturesStr */ ""));
|
|
|
|
if (!STI->isCPUStringValid(MCPU))
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
if (!STI->getSchedModel().isOutOfOrder()) {
|
|
|
|
errs() << "error: please specify an out-of-order cpu. '" << MCPU
|
|
|
|
<< "' is an in-order cpu.\n";
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!STI->getSchedModel().hasInstrSchedModel()) {
|
|
|
|
errs()
|
|
|
|
<< "error: unable to find instruction-level scheduling information for"
|
|
|
|
<< " target triple '" << TheTriple.normalize() << "' and cpu '" << MCPU
|
|
|
|
<< "'.\n";
|
|
|
|
|
|
|
|
if (STI->getSchedModel().InstrItineraries)
|
|
|
|
errs() << "note: cpu '" << MCPU << "' provides itineraries. However, "
|
|
|
|
<< "instruction itineraries are currently unsupported.\n";
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
std::unique_ptr<MCInstPrinter> IP(TheTarget->createMCInstPrinter(
|
|
|
|
Triple(TripleName), OutputAsmVariant, *MAI, *MCII, *MRI));
|
|
|
|
if (!IP) {
|
|
|
|
errs() << "error: unable to create instruction printer for target triple '"
|
|
|
|
<< TheTriple.normalize() << "' with assembly variant "
|
|
|
|
<< OutputAsmVariant << ".\n";
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-04-08 17:10:19 +02:00
|
|
|
std::unique_ptr<MCAsmParser> P(createMCAsmParser(SrcMgr, Ctx, Str, *MAI));
|
2018-04-09 18:39:52 +02:00
|
|
|
MCAsmLexer &Lexer = P->getLexer();
|
|
|
|
MCACommentConsumer CC(Regions);
|
|
|
|
Lexer.setCommentConsumer(&CC);
|
|
|
|
|
2018-04-08 17:10:19 +02:00
|
|
|
if (AssembleInput(ProgName, *P, TheTarget, *STI, *MCII, MCOptions))
|
|
|
|
return 1;
|
2018-03-08 14:05:02 +01:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
if (Regions.empty()) {
|
2018-03-08 14:05:02 +01:00
|
|
|
errs() << "error: no assembly instructions found.\n";
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-03-08 17:08:43 +01:00
|
|
|
// Now initialize the output file.
|
|
|
|
auto OF = getOutputStream();
|
|
|
|
if (std::error_code EC = OF.getError()) {
|
|
|
|
errs() << EC.message() << '\n';
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
std::unique_ptr<llvm::ToolOutputFile> TOF = std::move(*OF);
|
|
|
|
|
2018-03-08 14:05:02 +01:00
|
|
|
const MCSchedModel &SM = STI->getSchedModel();
|
|
|
|
|
|
|
|
unsigned Width = SM.IssueWidth;
|
|
|
|
if (DispatchWidth)
|
|
|
|
Width = DispatchWidth;
|
|
|
|
|
2018-03-23 12:50:43 +01:00
|
|
|
// Create an instruction builder.
|
2018-04-08 17:10:19 +02:00
|
|
|
mca::InstrBuilder IB(*STI, *MCII);
|
2018-03-23 12:50:43 +01:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
// Number each region in the sequence.
|
|
|
|
unsigned RegionIdx = 0;
|
|
|
|
for (const std::unique_ptr<mca::CodeRegion> &Region : Regions) {
|
|
|
|
// Skip empty code regions.
|
|
|
|
if (Region->empty())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// Don't print the header of this region if it is the default region, and
|
|
|
|
// it doesn't have an end location.
|
|
|
|
if (Region->startLoc().isValid() || Region->endLoc().isValid()) {
|
|
|
|
TOF->os() << "\n[" << RegionIdx++ << "] Code Region";
|
|
|
|
StringRef Desc = Region->getDescription();
|
|
|
|
if (!Desc.empty())
|
|
|
|
TOF->os() << " - " << Desc;
|
|
|
|
TOF->os() << "\n\n";
|
2018-03-26 15:44:54 +02:00
|
|
|
}
|
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
mca::SourceMgr S(Region->getInstructions(),
|
|
|
|
PrintInstructionTables ? 1 : Iterations);
|
|
|
|
|
|
|
|
if (PrintInstructionTables) {
|
|
|
|
mca::InstructionTables IT(STI->getSchedModel(), IB, S);
|
|
|
|
|
|
|
|
if (PrintInstructionInfoView) {
|
|
|
|
IT.addView(
|
|
|
|
llvm::make_unique<mca::InstructionInfoView>(*STI, *MCII, S, *IP));
|
|
|
|
}
|
2018-03-26 14:04:53 +02:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
IT.addView(llvm::make_unique<mca::ResourcePressureView>(*STI, *IP, S));
|
|
|
|
IT.run();
|
|
|
|
IT.printReport(TOF->os());
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
mca::Backend B(*STI, *MRI, IB, S, Width, RegisterFileSize, LoadQueueSize,
|
|
|
|
StoreQueueSize, AssumeNoAlias);
|
|
|
|
mca::BackendPrinter Printer(B);
|
2018-03-09 14:52:03 +01:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
Printer.addView(llvm::make_unique<mca::SummaryView>(S, Width));
|
|
|
|
if (PrintInstructionInfoView)
|
|
|
|
Printer.addView(
|
|
|
|
llvm::make_unique<mca::InstructionInfoView>(*STI, *MCII, S, *IP));
|
2018-03-23 20:40:04 +01:00
|
|
|
|
2018-04-10 16:55:14 +02:00
|
|
|
if (PrintDispatchStats)
|
2018-04-11 14:31:44 +02:00
|
|
|
Printer.addView(llvm::make_unique<mca::DispatchStatistics>());
|
2018-04-10 16:55:14 +02:00
|
|
|
|
2018-04-11 14:12:53 +02:00
|
|
|
if (PrintSchedulerStats)
|
2018-04-11 13:37:46 +02:00
|
|
|
Printer.addView(llvm::make_unique<mca::SchedulerStatistics>(*STI));
|
|
|
|
|
2018-04-11 14:12:53 +02:00
|
|
|
if (PrintRetireStats)
|
|
|
|
Printer.addView(llvm::make_unique<mca::RetireControlUnitStatistics>());
|
2018-03-08 17:08:43 +01:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
if (PrintRegisterFileStats)
|
|
|
|
Printer.addView(llvm::make_unique<mca::RegisterFileStatistics>(*STI));
|
2018-03-08 17:08:43 +01:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
if (PrintResourcePressureView)
|
|
|
|
Printer.addView(
|
|
|
|
llvm::make_unique<mca::ResourcePressureView>(*STI, *IP, S));
|
2018-04-03 18:46:23 +02:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
if (PrintTimelineView) {
|
|
|
|
Printer.addView(llvm::make_unique<mca::TimelineView>(
|
|
|
|
*STI, *IP, S, TimelineMaxIterations, TimelineMaxCycles));
|
|
|
|
}
|
2018-03-08 17:08:43 +01:00
|
|
|
|
2018-04-09 18:39:52 +02:00
|
|
|
B.run();
|
|
|
|
Printer.printReport(TOF->os());
|
2018-03-08 17:08:43 +01:00
|
|
|
}
|
2018-03-08 14:05:02 +01:00
|
|
|
|
2018-03-08 17:08:43 +01:00
|
|
|
TOF->keep();
|
2018-03-08 14:05:02 +01:00
|
|
|
return 0;
|
|
|
|
}
|