2011-04-02 01:15:50 +02:00
|
|
|
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
|
|
|
|
|
|
|
|
# Opcode=0 Name=PHI Format=(42)
|
2011-08-09 22:55:18 +02:00
|
|
|
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
|
2011-04-02 01:15:50 +02:00
|
|
|
# -------------------------------------------------------------------------------------------------
|
|
|
|
# | 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 1| 1: 1: 0: 0| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 1: 0|
|
|
|
|
# -------------------------------------------------------------------------------------------------
|
|
|
|
# To qualify as an LSL (immediate) instruction, Inst{19-16} "should" be 0b0000, instead it is = 0b1100.
|
|
|
|
# The instruction is UNPREDICTABLE, and is not a valid intruction.
|
|
|
|
#
|
|
|
|
# See also
|
|
|
|
# A8.6.88 LSL (immediate)
|
|
|
|
# A8.6.98 MOV (shifted register), and
|
|
|
|
# I.1 Instruction encoding diagrams and pseudocode
|
|
|
|
0x2 0xd1 0xbc 0xf1
|
|
|
|
|
|
|
|
|