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llvm-mirror/test/CodeGen/X86/fast-isel-bc.ll

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Mark all these as needing SSE2. Should fix PPC and maybe even Linux. llvm-svn: 115291
2010-10-01 06:17:55 +02:00
; RUN: llc < %s -O0 -regalloc=linearscan -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 07:33:42 +02:00
; PR4684
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin9.8"
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. llvm-svn: 115243
2010-10-01 01:57:10 +02:00
declare void @func2(x86_mmx)
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 07:33:42 +02:00
define void @func1() nounwind {
; This isn't spectacular, but it's MMX code at -O0...
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. llvm-svn: 115243
2010-10-01 01:57:10 +02:00
; CHECK: movq2dq %mm0, %xmm0
; For now, handling of x86_mmx parameters in fast Isel is unimplemented,
; so we get pretty poor code. The below is preferable.
; CHEK: movl $2, %eax
; CHEK: movd %rax, %mm0
; CHEK: movd %mm0, %rdi
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 07:33:42 +02:00
Massive rewrite of MMX: The x86_mmx type is used for MMX intrinsics, parameters and return values where these use MMX registers, and is also supported in load, store, and bitcast. Only the above operations generate MMX instructions, and optimizations do not operate on or produce MMX intrinsics. MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into smaller pieces. Optimizations may occur on these forms and the result casted back to x86_mmx, provided the result feeds into a previous existing x86_mmx operation. The point of all this is prevent optimizations from introducing MMX operations, which is unsafe due to the EMMS problem. llvm-svn: 115243
2010-10-01 01:57:10 +02:00
%tmp0 = bitcast <2 x i32><i32 0, i32 2> to x86_mmx
call void @func2(x86_mmx %tmp0)
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for MMX arguments. This fixes PR4684. llvm-svn: 78163
2009-08-05 07:33:42 +02:00
ret void
}
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