llvm-mirror/test/CodeGen/X86/4char-promote.ll

; A test for checking PR 9623
; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s

target triple = "x86_64-apple-darwin"

; CHECK:  pmulld
; CHECK:  paddd
; CHECK-NOT:  movdqa
; CHECK:  ret

define <4 x i8> @foo(<4 x i8> %x, <4 x i8> %y) {
entry:
 %binop = mul <4 x i8> %x, %y
 %binop6 = add <4 x i8> %binop, %x
 ret <4 x i8> %binop6
}
This test was failing on X86 machines which do not have SSE4. Fixed the test by specifying that the target CPU is corei7. llvm-svn: 133053 2011-06-15 14:26:53 +02:00			`; A test for checking PR 9623`
Remove the "-promote-elements" flag. This flag is now enabled by default. llvm-svn: 157925 2012-06-04 13:27:21 +02:00			`; RUN: llc -march=x86-64 -mcpu=corei7 < %s \| FileCheck %s`
This test was failing on X86 machines which do not have SSE4. Fixed the test by specifying that the target CPU is corei7. llvm-svn: 133053 2011-06-15 14:26:53 +02:00
			`target triple = "x86_64-apple-darwin"`

Remove the "-promote-elements" flag. This flag is now enabled by default. llvm-svn: 157925 2012-06-04 13:27:21 +02:00			`; CHECK: pmulld`
			`; CHECK: paddd`
			`; CHECK-NOT: movdqa`
Fix two-address pass's aggressive instruction commuting heuristics. It's meant to catch cases like: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 By commuting ADD, it let coalescer eliminate all of the copies. However, there was a bug in the heuristics where it ended up commuting the ADD in: %reg1024<def> = MOV r0 %reg1025<def> = MOV 0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 That did no benefit but rather ensure the last MOV would not be coalesced. rdar://11355268 llvm-svn: 156048 2012-05-03 03:45:13 +02:00			`; CHECK: ret`
This test was failing on X86 machines which do not have SSE4. Fixed the test by specifying that the target CPU is corei7. llvm-svn: 133053 2011-06-15 14:26:53 +02:00
			`define <4 x i8> @foo(<4 x i8> %x, <4 x i8> %y) {`
			`entry:`
			`%binop = mul <4 x i8> %x, %y`
			`%binop6 = add <4 x i8> %binop, %x`
			`ret <4 x i8> %binop6`
			`}`