2015-12-06 21:12:19 +01:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
2011-08-17 04:29:19 +02:00
|
|
|
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
|
|
|
|
|
|
|
|
define <4 x i64> @A(i64* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: A:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-17 04:29:19 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load i64, i64* %ptr, align 8
|
2011-08-17 04:29:19 +02:00
|
|
|
%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <4 x i64> %vecinit.i, i64 %q, i32 1
|
|
|
|
%vecinit4.i = insertelement <4 x i64> %vecinit2.i, i64 %q, i32 2
|
|
|
|
%vecinit6.i = insertelement <4 x i64> %vecinit4.i, i64 %q, i32 3
|
|
|
|
ret <4 x i64> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
|
|
|
define <8 x i32> @B(i32* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: B:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-17 04:29:19 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load i32, i32* %ptr, align 4
|
2011-08-17 04:29:19 +02:00
|
|
|
%vecinit.i = insertelement <8 x i32> undef, i32 %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <8 x i32> %vecinit.i, i32 %q, i32 1
|
|
|
|
%vecinit4.i = insertelement <8 x i32> %vecinit2.i, i32 %q, i32 2
|
|
|
|
%vecinit6.i = insertelement <8 x i32> %vecinit4.i, i32 %q, i32 3
|
|
|
|
ret <8 x i32> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x double> @C(double* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: C:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-17 04:29:19 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load double, double* %ptr, align 8
|
2011-08-17 04:29:19 +02:00
|
|
|
%vecinit.i = insertelement <4 x double> undef, double %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <4 x double> %vecinit.i, double %q, i32 1
|
|
|
|
%vecinit4.i = insertelement <4 x double> %vecinit2.i, double %q, i32 2
|
|
|
|
%vecinit6.i = insertelement <4 x double> %vecinit4.i, double %q, i32 3
|
|
|
|
ret <4 x double> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
|
|
|
define <8 x float> @D(float* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: D:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-17 04:29:19 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load float, float* %ptr, align 4
|
2011-08-17 04:29:19 +02:00
|
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <8 x float> %vecinit.i, float %q, i32 1
|
|
|
|
%vecinit4.i = insertelement <8 x float> %vecinit2.i, float %q, i32 2
|
|
|
|
%vecinit6.i = insertelement <8 x float> %vecinit4.i, float %q, i32 3
|
|
|
|
ret <8 x float> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
|
|
|
;;;; 128-bit versions
|
|
|
|
|
2012-04-08 14:54:54 +02:00
|
|
|
define <4 x float> @e(float* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: e:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-17 04:29:19 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load float, float* %ptr, align 4
|
2011-08-17 04:29:19 +02:00
|
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <4 x float> %vecinit.i, float %q, i32 1
|
|
|
|
%vecinit4.i = insertelement <4 x float> %vecinit2.i, float %q, i32 2
|
|
|
|
%vecinit6.i = insertelement <4 x float> %vecinit4.i, float %q, i32 3
|
|
|
|
ret <4 x float> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
2015-12-06 21:12:19 +01:00
|
|
|
; Don't broadcast constants on pre-AVX2 hardware.
|
2012-04-08 14:54:54 +02:00
|
|
|
define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: _e2:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [-7.812500e-03,-7.812500e-03,-7.812500e-03,-7.812500e-03]
|
|
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
|
|
|
%vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0
|
2012-04-08 14:54:54 +02:00
|
|
|
%vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1
|
|
|
|
%vecinit4.i = insertelement <4 x float> %vecinit2.i, float 0xbf80000000000000, i32 2
|
|
|
|
%vecinit6.i = insertelement <4 x float> %vecinit4.i, float 0xbf80000000000000, i32 3
|
|
|
|
ret <4 x float> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2011-08-17 04:29:19 +02:00
|
|
|
define <4 x i32> @F(i32* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: F:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-17 04:29:19 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load i32, i32* %ptr, align 4
|
2011-08-17 04:29:19 +02:00
|
|
|
%vecinit.i = insertelement <4 x i32> undef, i32 %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <4 x i32> %vecinit.i, i32 %q, i32 1
|
|
|
|
%vecinit4.i = insertelement <4 x i32> %vecinit2.i, i32 %q, i32 2
|
|
|
|
%vecinit6.i = insertelement <4 x i32> %vecinit4.i, i32 %q, i32 3
|
|
|
|
ret <4 x i32> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
|
|
|
; Unsupported vbroadcasts
|
|
|
|
|
|
|
|
define <2 x i64> @G(i64* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: G:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
|
|
|
|
; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
|
|
|
|
; CHECK-NEXT: retq
|
2011-08-17 04:29:19 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load i64, i64* %ptr, align 8
|
2011-08-17 04:29:19 +02:00
|
|
|
%vecinit.i = insertelement <2 x i64> undef, i64 %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <2 x i64> %vecinit.i, i64 %q, i32 1
|
|
|
|
ret <2 x i64> %vecinit2.i
|
|
|
|
}
|
2011-09-01 20:15:06 +02:00
|
|
|
|
|
|
|
define <4 x i32> @H(<4 x i32> %a) {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: H:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
|
|
|
|
; CHECK-NEXT: retq
|
|
|
|
entry:
|
2011-09-01 20:15:06 +02:00
|
|
|
%x = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
|
|
|
ret <4 x i32> %x
|
|
|
|
}
|
|
|
|
|
2012-01-10 09:23:59 +01:00
|
|
|
define <2 x double> @I(double* %ptr) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: I:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
|
|
|
|
; CHECK-NEXT: retq
|
2012-01-10 09:23:59 +01:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load double, double* %ptr, align 4
|
2012-01-10 09:23:59 +01:00
|
|
|
%vecinit.i = insertelement <2 x double> undef, double %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <2 x double> %vecinit.i, double %q, i32 1
|
|
|
|
ret <2 x double> %vecinit2.i
|
|
|
|
}
|
2012-05-10 14:22:05 +02:00
|
|
|
|
|
|
|
define <4 x float> @_RR(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: _RR:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
|
|
|
|
; CHECK-NEXT: movl (%rsi), %eax
|
|
|
|
; CHECK-NEXT: movl %eax, (%rax)
|
|
|
|
; CHECK-NEXT: retq
|
2012-05-10 14:22:05 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load float, float* %ptr, align 4
|
2012-05-10 14:22:05 +02:00
|
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
|
|
%vecinit2.i = insertelement <4 x float> %vecinit.i, float %q, i32 1
|
|
|
|
%vecinit4.i = insertelement <4 x float> %vecinit2.i, float %q, i32 2
|
|
|
|
%vecinit6.i = insertelement <4 x float> %vecinit4.i, float %q, i32 3
|
|
|
|
; force a chain
|
2015-02-27 22:17:42 +01:00
|
|
|
%j = load i32, i32* %k, align 4
|
2012-05-10 14:22:05 +02:00
|
|
|
store i32 %j, i32* undef
|
|
|
|
ret <4 x float> %vecinit6.i
|
|
|
|
}
|
|
|
|
|
2012-05-10 14:39:13 +02:00
|
|
|
define <4 x float> @_RR2(float* %ptr, i32* %k) nounwind uwtable readnone ssp {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: _RR2:
|
|
|
|
; CHECK: ## BB#0: ## %entry
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
|
|
|
|
; CHECK-NEXT: retq
|
2012-05-10 14:39:13 +02:00
|
|
|
entry:
|
2015-02-27 22:17:42 +01:00
|
|
|
%q = load float, float* %ptr, align 4
|
2012-05-10 14:39:13 +02:00
|
|
|
%v = insertelement <4 x float> undef, float %q, i32 0
|
|
|
|
%t = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> zeroinitializer
|
|
|
|
ret <4 x float> %t
|
|
|
|
}
|
|
|
|
|
Teach the DAGCombiner how to fold concat_vector nodes when the input is two
BUILD_VECTOR nodes, e.g.:
(concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4))
->
(BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4)
This fixes an issue with AVX, where a sequence was not recognized as a 256-bit
vbroadcast due to the concat_vectors.
llvm-svn: 201158
2014-02-11 16:42:46 +01:00
|
|
|
; These tests check that a vbroadcast instruction is used when we have a splat
|
|
|
|
; formed from a concat_vectors (via the shufflevector) of two BUILD_VECTORs
|
|
|
|
; (via the insertelements).
|
|
|
|
|
|
|
|
define <8 x float> @splat_concat1(float* %p) {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: splat_concat1:
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2015-02-27 22:17:42 +01:00
|
|
|
%1 = load float, float* %p, align 4
|
Teach the DAGCombiner how to fold concat_vector nodes when the input is two
BUILD_VECTOR nodes, e.g.:
(concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4))
->
(BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4)
This fixes an issue with AVX, where a sequence was not recognized as a 256-bit
vbroadcast due to the concat_vectors.
llvm-svn: 201158
2014-02-11 16:42:46 +01:00
|
|
|
%2 = insertelement <4 x float> undef, float %1, i32 0
|
|
|
|
%3 = insertelement <4 x float> %2, float %1, i32 1
|
|
|
|
%4 = insertelement <4 x float> %3, float %1, i32 2
|
|
|
|
%5 = insertelement <4 x float> %4, float %1, i32 3
|
|
|
|
%6 = shufflevector <4 x float> %5, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
|
|
|
|
ret <8 x float> %6
|
|
|
|
}
|
|
|
|
|
|
|
|
define <8 x float> @splat_concat2(float* %p) {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: splat_concat2:
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2015-02-27 22:17:42 +01:00
|
|
|
%1 = load float, float* %p, align 4
|
Teach the DAGCombiner how to fold concat_vector nodes when the input is two
BUILD_VECTOR nodes, e.g.:
(concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4))
->
(BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4)
This fixes an issue with AVX, where a sequence was not recognized as a 256-bit
vbroadcast due to the concat_vectors.
llvm-svn: 201158
2014-02-11 16:42:46 +01:00
|
|
|
%2 = insertelement <4 x float> undef, float %1, i32 0
|
|
|
|
%3 = insertelement <4 x float> %2, float %1, i32 1
|
|
|
|
%4 = insertelement <4 x float> %3, float %1, i32 2
|
|
|
|
%5 = insertelement <4 x float> %4, float %1, i32 3
|
|
|
|
%6 = insertelement <4 x float> undef, float %1, i32 0
|
|
|
|
%7 = insertelement <4 x float> %6, float %1, i32 1
|
|
|
|
%8 = insertelement <4 x float> %7, float %1, i32 2
|
|
|
|
%9 = insertelement <4 x float> %8, float %1, i32 3
|
|
|
|
%10 = shufflevector <4 x float> %5, <4 x float> %9, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
|
|
ret <8 x float> %10
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x double> @splat_concat3(double* %p) {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: splat_concat3:
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2015-02-27 22:17:42 +01:00
|
|
|
%1 = load double, double* %p, align 8
|
Teach the DAGCombiner how to fold concat_vector nodes when the input is two
BUILD_VECTOR nodes, e.g.:
(concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4))
->
(BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4)
This fixes an issue with AVX, where a sequence was not recognized as a 256-bit
vbroadcast due to the concat_vectors.
llvm-svn: 201158
2014-02-11 16:42:46 +01:00
|
|
|
%2 = insertelement <2 x double> undef, double %1, i32 0
|
|
|
|
%3 = insertelement <2 x double> %2, double %1, i32 1
|
|
|
|
%4 = shufflevector <2 x double> %3, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
|
|
|
|
ret <4 x double> %4
|
|
|
|
}
|
|
|
|
|
|
|
|
define <4 x double> @splat_concat4(double* %p) {
|
2015-12-06 21:12:19 +01:00
|
|
|
; CHECK-LABEL: splat_concat4:
|
|
|
|
; CHECK: ## BB#0:
|
|
|
|
; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
|
|
|
|
; CHECK-NEXT: retq
|
2015-02-27 22:17:42 +01:00
|
|
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%1 = load double, double* %p, align 8
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Teach the DAGCombiner how to fold concat_vector nodes when the input is two
BUILD_VECTOR nodes, e.g.:
(concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4))
->
(BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4)
This fixes an issue with AVX, where a sequence was not recognized as a 256-bit
vbroadcast due to the concat_vectors.
llvm-svn: 201158
2014-02-11 16:42:46 +01:00
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%2 = insertelement <2 x double> undef, double %1, i32 0
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%3 = insertelement <2 x double> %2, double %1, i32 1
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%4 = insertelement <2 x double> undef, double %1, i32 0
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%5 = insertelement <2 x double> %2, double %1, i32 1
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%6 = shufflevector <2 x double> %3, <2 x double> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x double> %6
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}
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