llvm-mirror/test/CodeGen/X86/vec_shuffle-19.ll

; REQUIRES: asserts
; RUN: llc < %s -o /dev/null -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 4
; PR2485

define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind  {
entry:
	%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> < i32 4, i32 0, i32 0, i32 0 >		; <<4 x i32>> [#uses=1]
	ret <4 x i32> %shuffle
}
Revert the test moves from 176733. Use "REQUIRES: asserts" instead. llvm-svn: 176873 2013-03-12 17:27:52 +01:00			`; REQUIRES: asserts`
Add mcpu to tests to prevent them from using AVX instructions on Sandy Bridge after r155618. llvm-svn: 155696 2012-04-27 09:11:58 +02:00			`; RUN: llc < %s -o /dev/null -march=x86 -mcpu=penryn -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - \| grep asm-printer \| grep 4`
Fix PR2485: do all 4-element SSE shuffles in max. of 2 shuffle instructions. Based on patch by Nicolas Capens. llvm-svn: 53939 2008-07-23 02:22:17 +02:00			`; PR2485`

			`define <4 x i32> @t(<4 x i32> %a, <4 x i32> %b) nounwind {`
			`entry:`
			`%shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> < i32 4, i32 0, i32 0, i32 0 > ; <<4 x i32>> [#uses=1]`
			`ret <4 x i32> %shuffle`
			`}`