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llvm-mirror/test/CodeGen/X86/pr33844.ll

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[X86] Don't try to scale down if that exceeds the bitwidth. Fixes the crash reported in PR33844. llvm-svn: 308503
2017-07-19 20:09:46 +02:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -o - %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@global = external global i32
@global.1 = external global i64
define void @patatino() {
; CHECK-LABEL: patatino:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-04 18:18:51 +01:00
; CHECK: # %bb.0: # %bb
[X86] Don't try to scale down if that exceeds the bitwidth. Fixes the crash reported in PR33844. llvm-svn: 308503
2017-07-19 20:09:46 +02:00
; CHECK-NEXT: movl {{.*}}(%rip), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shrl $31, %ecx
; CHECK-NEXT: addl $2147483647, %ecx # imm = 0x7FFFFFFF
; CHECK-NEXT: shrl $31, %ecx
[x86] shrink 'and' immediate values by setting the high bits (PR35907) Try to reverse the constant-shrinking that happens in SimplifyDemandedBits() for 'and' masks when it results in a smaller sign-extended immediate. We are also able to detect dead 'and' ops here (the mask is all ones). In that case, we replace and return without selecting the 'and'. Other targets might want to share some of this logic by enabling this under a target hook, but I didn't see diffs for simple cases with PowerPC or AArch64, so they may already have some specialized logic for this kind of thing or have different needs. This should solve PR35907: https://bugs.llvm.org/show_bug.cgi?id=35907 Differential Revision: https://reviews.llvm.org/D42088 llvm-svn: 322957
2018-01-19 17:37:25 +01:00
; CHECK-NEXT: andl $-2, %ecx
[X86] Don't try to scale down if that exceeds the bitwidth. Fixes the crash reported in PR33844. llvm-svn: 308503
2017-07-19 20:09:46 +02:00
; CHECK-NEXT: andl $-536870912, %eax # imm = 0xE0000000
; CHECK-NEXT: orl %ecx, %eax
; CHECK-NEXT: movl %eax, {{.*}}(%rip)
; CHECK-NEXT: retq
bb:
%tmp = load i32, i32* @global
%tmp1 = lshr i32 %tmp, 31
%tmp2 = add nuw nsw i32 %tmp1, 2147483647
%tmp3 = load i64, i64* @global.1
%tmp4 = shl i64 %tmp3, 23
%tmp5 = add nsw i64 %tmp4, 8388639
%tmp6 = trunc i64 %tmp5 to i32
%tmp7 = lshr i32 %tmp2, %tmp6
%tmp8 = load i32, i32* @global
%tmp9 = and i32 %tmp7, 62
%tmp10 = and i32 %tmp8, -536870912
%tmp11 = or i32 %tmp9, %tmp10
store i32 %tmp11, i32* @global
ret void
}
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