llvm-mirror/test/CodeGen/AArch64/arm64-frameaddr.ll

; RUN: llc < %s -march=arm64 | FileCheck %s

define i8* @t() nounwind {
entry:
; CHECK-LABEL: t:
; CHECK: stp x29, x30, [sp, #-16]!
; CHECK: mov x29, sp
; CHECK: mov x0, x29
; CHECK: ldp x29, x30, [sp], #16
; CHECK: ret
	%0 = call i8* @llvm.frameaddress(i32 0)
        ret i8* %0
}

declare i8* @llvm.frameaddress(i32) nounwind readnone
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090 2014-03-29 11:18:08 +01:00			`; RUN: llc < %s -march=arm64 \| FileCheck %s`

			`define i8* @t() nounwind {`
			`entry:`
			`; CHECK-LABEL: t:`
[ARM64] Rename LR to the UAL-compliant 'X30'. llvm-svn: 205885 2014-04-09 16:43:59 +02:00			`; CHECK: stp x29, x30, [sp, #-16]!`
[ARM64] Rename FP to the UAL-compliant 'X29'. llvm-svn: 205884 2014-04-09 16:43:50 +02:00			`; CHECK: mov x29, sp`
			`; CHECK: mov x0, x29`
[ARM64] Rename LR to the UAL-compliant 'X30'. llvm-svn: 205885 2014-04-09 16:43:59 +02:00			`; CHECK: ldp x29, x30, [sp], #16`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090 2014-03-29 11:18:08 +01:00			`; CHECK: ret`
			`%0 = call i8* @llvm.frameaddress(i32 0)`
			`ret i8* %0`
			`}`

			`declare i8* @llvm.frameaddress(i32) nounwind readnone`