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llvm-mirror/test/CodeGen/Mips/hf16call32_body.ll

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[Mips] Adjust float ABI settings in case of MIPS16 mode. Hard float for mips16 means essentially to compile as soft float but to use a runtime library for soft float that is written with native mips32 floating point instructions (those runtime routines run in mips32 hard float mode). The patch reviewed by Reed Kotler. llvm-svn: 195123
2013-11-19 13:20:17 +01:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=stel
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
@x = external global float
@xd = external global double
@y = external global float
@yd = external global double
@ret_sf = external global float
@ret_df = external global double
@ret_sc = external global { float, float }
@ret_dc = external global { double, double }
; Function Attrs: nounwind
define void @v_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
%0 = load float* %p.addr, align 4
store float %0, float* @x, align 4
ret void
}
; stel: .section .mips16.fn.v_sf,"ax",@progbits
; stel: .ent __fn_stub_v_sf
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,v_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: jr $25
; stel: __fn_local_v_sf = v_sf
; stel: .end __fn_stub_v_sf
declare i32 @printf(i8*, ...) #1
; Function Attrs: nounwind
define void @v_df(double %p) #0 {
entry:
%p.addr = alloca double, align 8
store double %p, double* %p.addr, align 8
%0 = load double* %p.addr, align 8
store double %0, double* @xd, align 8
ret void
}
; stel: .section .mips16.fn.v_df,"ax",@progbits
; stel: .ent __fn_stub_v_df
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,v_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f13
; stel: jr $25
; stel: __fn_local_v_df = v_df
; stel: .end __fn_stub_v_df
; Function Attrs: nounwind
define void @v_sf_sf(float %p1, float %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca float, align 4
store float %p1, float* %p1.addr, align 4
store float %p2, float* %p2.addr, align 4
%0 = load float* %p1.addr, align 4
store float %0, float* @x, align 4
%1 = load float* %p2.addr, align 4
store float %1, float* @y, align 4
ret void
}
; stel: .section .mips16.fn.v_sf_sf,"ax",@progbits
; stel: .ent __fn_stub_v_sf_sf
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,v_sf_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f14
; stel: jr $25
; stel: __fn_local_v_sf_sf = v_sf_sf
; stel: .end __fn_stub_v_sf_sf
; Function Attrs: nounwind
define void @v_sf_df(float %p1, double %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca double, align 8
store float %p1, float* %p1.addr, align 4
store double %p2, double* %p2.addr, align 8
%0 = load float* %p1.addr, align 4
store float %0, float* @x, align 4
%1 = load double* %p2.addr, align 8
store double %1, double* @yd, align 8
ret void
}
; stel: .section .mips16.fn.v_sf_df,"ax",@progbits
; stel: .ent __fn_stub_v_sf_df
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,v_sf_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $6,$f14
; stel: mfc1 $7,$f15
; stel: jr $25
; stel: __fn_local_v_sf_df = v_sf_df
; stel: .end __fn_stub_v_sf_df
; Function Attrs: nounwind
define void @v_df_sf(double %p1, float %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca float, align 4
store double %p1, double* %p1.addr, align 8
store float %p2, float* %p2.addr, align 4
%0 = load double* %p1.addr, align 8
store double %0, double* @xd, align 8
%1 = load float* %p2.addr, align 4
store float %1, float* @y, align 4
ret void
}
; stel: .section .mips16.fn.v_df_sf,"ax",@progbits
; stel: .ent __fn_stub_v_df_sf
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,v_df_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f13
; stel: mfc1 $6,$f14
; stel: jr $25
; stel: __fn_local_v_df_sf = v_df_sf
; stel: .end __fn_stub_v_df_sf
; Function Attrs: nounwind
define void @v_df_df(double %p1, double %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca double, align 8
store double %p1, double* %p1.addr, align 8
store double %p2, double* %p2.addr, align 8
%0 = load double* %p1.addr, align 8
store double %0, double* @xd, align 8
%1 = load double* %p2.addr, align 8
store double %1, double* @yd, align 8
ret void
}
; stel: .section .mips16.fn.v_df_df,"ax",@progbits
; stel: .ent __fn_stub_v_df_df
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,v_df_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f13
; stel: mfc1 $6,$f14
; stel: mfc1 $7,$f15
; stel: jr $25
; stel: __fn_local_v_df_df = v_df_df
; stel: .end __fn_stub_v_df_df
; Function Attrs: nounwind
define float @sf_v() #0 {
entry:
%0 = load float* @ret_sf, align 4
ret float %0
}
; Function Attrs: nounwind
define float @sf_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
%0 = load float* %p.addr, align 4
store float %0, float* @x, align 4
%1 = load float* @ret_sf, align 4
ret float %1
}
; stel: .section .mips16.fn.sf_sf,"ax",@progbits
; stel: .ent __fn_stub_sf_sf
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,sf_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: jr $25
; stel: __fn_local_sf_sf = sf_sf
; stel: .end __fn_stub_sf_sf
; Function Attrs: nounwind
define float @sf_df(double %p) #0 {
entry:
%p.addr = alloca double, align 8
store double %p, double* %p.addr, align 8
%0 = load double* %p.addr, align 8
store double %0, double* @xd, align 8
%1 = load float* @ret_sf, align 4
ret float %1
}
; stel: .section .mips16.fn.sf_df,"ax",@progbits
; stel: .ent __fn_stub_sf_df
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,sf_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f13
; stel: jr $25
; stel: __fn_local_sf_df = sf_df
; stel: .end __fn_stub_sf_df
; Function Attrs: nounwind
define float @sf_sf_sf(float %p1, float %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca float, align 4
store float %p1, float* %p1.addr, align 4
store float %p2, float* %p2.addr, align 4
%0 = load float* %p1.addr, align 4
store float %0, float* @x, align 4
%1 = load float* %p2.addr, align 4
store float %1, float* @y, align 4
%2 = load float* @ret_sf, align 4
ret float %2
}
; stel: .section .mips16.fn.sf_sf_sf,"ax",@progbits
; stel: .ent __fn_stub_sf_sf_sf
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,sf_sf_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f14
; stel: jr $25
; stel: __fn_local_sf_sf_sf = sf_sf_sf
; stel: .end __fn_stub_sf_sf_sf
; Function Attrs: nounwind
define float @sf_sf_df(float %p1, double %p2) #0 {
entry:
%p1.addr = alloca float, align 4
%p2.addr = alloca double, align 8
store float %p1, float* %p1.addr, align 4
store double %p2, double* %p2.addr, align 8
%0 = load float* %p1.addr, align 4
store float %0, float* @x, align 4
%1 = load double* %p2.addr, align 8
store double %1, double* @yd, align 8
%2 = load float* @ret_sf, align 4
ret float %2
}
; stel: .section .mips16.fn.sf_sf_df,"ax",@progbits
; stel: .ent __fn_stub_sf_sf_df
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,sf_sf_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $6,$f14
; stel: mfc1 $7,$f15
; stel: jr $25
; stel: __fn_local_sf_sf_df = sf_sf_df
; stel: .end __fn_stub_sf_sf_df
; Function Attrs: nounwind
define float @sf_df_sf(double %p1, float %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca float, align 4
store double %p1, double* %p1.addr, align 8
store float %p2, float* %p2.addr, align 4
%0 = load double* %p1.addr, align 8
store double %0, double* @xd, align 8
%1 = load float* %p2.addr, align 4
store float %1, float* @y, align 4
%2 = load float* @ret_sf, align 4
ret float %2
}
; stel: .section .mips16.fn.sf_df_sf,"ax",@progbits
; stel: .ent __fn_stub_sf_df_sf
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,sf_df_sf
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f13
; stel: mfc1 $6,$f14
; stel: jr $25
; stel: __fn_local_sf_df_sf = sf_df_sf
; stel: .end __fn_stub_sf_df_sf
; Function Attrs: nounwind
define float @sf_df_df(double %p1, double %p2) #0 {
entry:
%p1.addr = alloca double, align 8
%p2.addr = alloca double, align 8
store double %p1, double* %p1.addr, align 8
store double %p2, double* %p2.addr, align 8
%0 = load double* %p1.addr, align 8
store double %0, double* @xd, align 8
%1 = load double* %p2.addr, align 8
store double %1, double* @yd, align 8
%2 = load float* @ret_sf, align 4
ret float %2
}
; stel: .section .mips16.fn.sf_df_df,"ax",@progbits
; stel: .ent __fn_stub_sf_df_df
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
; stel: la $25,sf_df_df
Patch number 2 for mips16/32 floating point interoperability stubs. This creates stubs that help Mips32 functions call Mips16 functions which have floating point parameters that are normally passed in floating point registers. llvm-svn: 181972
2013-05-16 04:17:42 +02:00
; stel: mfc1 $4,$f12
; stel: mfc1 $5,$f13
; stel: mfc1 $6,$f14
; stel: mfc1 $7,$f15
; stel: jr $25
; stel: __fn_local_sf_df_df = sf_df_df
; stel: .end __fn_stub_sf_df_df
Update to remove the no-frame-pointer-elim-non-leaf flag if it was set to 'false'. llvm-svn: 189068
2013-08-22 23:28:54 +02:00
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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