2012-04-27 09:11:58 +02:00
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; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -mcpu=nehalem | FileCheck %s
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Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
llvm-svn: 90984
2009-12-09 22:00:30 +01:00
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; rdar://7434544
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2011-11-23 08:13:56 +01:00
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define <2 x i64> @t2() nounwind {
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Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
llvm-svn: 90984
2009-12-09 22:00:30 +01:00
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entry:
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; CHECK: t2:
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; CHECK: pshufd $85, (%esp), %xmm0
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%array = alloca [8 x float], align 4
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%arrayidx = getelementptr inbounds [8 x float]* %array, i32 0, i32 1
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%tmp2 = load float* %arrayidx
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%vecinit = insertelement <4 x float> undef, float %tmp2, i32 0
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%vecinit5 = insertelement <4 x float> %vecinit, float %tmp2, i32 1
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%vecinit7 = insertelement <4 x float> %vecinit5, float %tmp2, i32 2
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%vecinit9 = insertelement <4 x float> %vecinit7, float %tmp2, i32 3
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%0 = bitcast <4 x float> %vecinit9 to <2 x i64>
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ret <2 x i64> %0
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}
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