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llvm-mirror/test/CodeGen/X86/commute-two-addr.ll

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Add several testcases for new optimizations in the code generator. llvm-svn: 19244
2005-01-02 03:30:04 +01:00
; The register allocator can commute two-address instructions to avoid
; insertion of register-register copies.
tweak test to accept the (good) code emitted by the pattern isel llvm-svn: 21812
2005-05-09 07:54:27 +02:00
; Make sure there are only 3 mov's for each testcase
Add -mcpu to some unit tests that only fail on certain hosts. llvm-svn: 184709
2013-06-24 11:51:30 +02:00
; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefix=LINUX
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s -check-prefix=DARWIN
Add several testcases for new optimizations in the code generator. llvm-svn: 19244
2005-01-02 03:30:04 +01:00
set the target triple so that we don't fail due to X86 abi issues llvm-svn: 22479
2005-07-20 05:56:48 +02:00
Remove llvm-upgrade and update tests. llvm-svn: 47432
2008-02-21 08:42:26 +01:00
@G = external global i32 ; <i32*> [#uses=2]
set the target triple so that we don't fail due to X86 abi issues llvm-svn: 22479
2005-07-20 05:56:48 +02:00
Remove llvm-upgrade and update tests. llvm-svn: 47432
2008-02-21 08:42:26 +01:00
declare void @ext(i32)
Add several testcases for new optimizations in the code generator. llvm-svn: 19244
2005-01-02 03:30:04 +01:00
Fix a minor bug in two-address pass. It was missing a commute opportunity. regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 llvm-svn: 121793
2010-12-14 22:34:53 +01:00
define i32 @t1(i32 %X, i32 %Y) nounwind {
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 08:24:09 +02:00
; LINUX-LABEL: t1:
Fix a minor bug in two-address pass. It was missing a commute opportunity. regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 llvm-svn: 121793
2010-12-14 22:34:53 +01:00
; LINUX: movl 4(%esp), %eax
; LINUX: movl 8(%esp), %ecx
; LINUX: addl %eax, %ecx
; LINUX: movl %ecx, G
Remove llvm-upgrade and update tests. llvm-svn: 47432
2008-02-21 08:42:26 +01:00
%Z = add i32 %X, %Y ; <i32> [#uses=1]
store i32 %Z, i32* @G
ret i32 %X
Add several testcases for new optimizations in the code generator. llvm-svn: 19244
2005-01-02 03:30:04 +01:00
}
Fix a minor bug in two-address pass. It was missing a commute opportunity. regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 llvm-svn: 121793
2010-12-14 22:34:53 +01:00
define i32 @t2(i32 %X, i32 %Y) nounwind {
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 08:24:09 +02:00
; LINUX-LABEL: t2:
Fix a minor bug in two-address pass. It was missing a commute opportunity. regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 llvm-svn: 121793
2010-12-14 22:34:53 +01:00
; LINUX: movl 4(%esp), %eax
; LINUX: movl 8(%esp), %ecx
; LINUX: xorl %eax, %ecx
; LINUX: movl %ecx, G
Remove llvm-upgrade and update tests. llvm-svn: 47432
2008-02-21 08:42:26 +01:00
%Z = xor i32 %X, %Y ; <i32> [#uses=1]
store i32 %Z, i32* @G
ret i32 %X
Add several testcases for new optimizations in the code generator. llvm-svn: 19244
2005-01-02 03:30:04 +01:00
}
Remove llvm-upgrade and update tests. llvm-svn: 47432
2008-02-21 08:42:26 +01:00
Fix a minor bug in two-address pass. It was missing a commute opportunity. regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 llvm-svn: 121793
2010-12-14 22:34:53 +01:00
; rdar://8762995
%0 = type { i64, i32 }
define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 08:24:09 +02:00
; DARWIN-LABEL: t3:
Revert "Temporarily enable MI-Sched on X86." This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c. llvm-svn: 184823
2013-06-25 04:48:58 +02:00
; DARWIN: shll $16
Fix a minor bug in two-address pass. It was missing a commute opportunity. regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 llvm-svn: 121793
2010-12-14 22:34:53 +01:00
; DARWIN: shlq $32, %rcx
; DARWIN-NOT: leaq
; DARWIN: orq %rcx, %rax
%tmp21 = zext i32 %lb to i64
%tmp23 = zext i32 %ub to i64
%tmp24 = shl i64 %tmp23, 32
%ins26 = or i64 %tmp24, %tmp21
%tmp28 = zext i8 %has_lb to i32
%tmp33 = zext i8 %has_ub to i32
%tmp34 = shl i32 %tmp33, 8
%tmp38 = zext i8 %lb_inclusive to i32
%tmp39 = shl i32 %tmp38, 16
%tmp43 = zext i8 %ub_inclusive to i32
%tmp44 = shl i32 %tmp43, 24
%ins31 = or i32 %tmp39, %tmp28
%ins36 = or i32 %ins31, %tmp34
%ins46 = or i32 %ins36, %tmp44
%tmp16 = insertvalue %0 undef, i64 %ins26, 0
%tmp19 = insertvalue %0 %tmp16, i32 %ins46, 1
ret %0 %tmp19
}
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