llvm-mirror/test/CodeGen/X86/sse-align-3.ll

; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT:     movapd
; CHECK:     movaps
; CHECK-NOT:     movapd
; CHECK:     movaps
; CHECK-NOT:     movap

define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {
  store <4 x float> %x, <4 x float>* %p
  ret void
}
define void @bar(<2 x double>* %p, <2 x double> %x) nounwind {
  store <2 x double> %x, <2 x double>* %p
  ret void
}
test/CodeGen/X86: FileCheck-ize and add explicit -mtriple=x86_64-linux. They are useless to Win64 target. llvm-svn: 127732 2011-03-16 13:52:38 +00:00			`; RUN: llc < %s -mtriple=x86_64-linux \| FileCheck %s`
			`; CHECK-NOT: movapd`
			`; CHECK: movaps`
Kill and collapse outstanding DomainValues. DomainValues that are only used by "don't care" instructions are now collapsed to the first possible execution domain after all basic blocks have been processed. This typically means the PS domain on x86. For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are completely collapsed to the PS domain instead of containing a mix of execution domains created by isel. llvm-svn: 144037 2011-11-07 23:08:21 +00:00			`; CHECK-NOT: movapd`
			`; CHECK: movaps`
test/CodeGen/X86: FileCheck-ize and add explicit -mtriple=x86_64-linux. They are useless to Win64 target. llvm-svn: 127732 2011-03-16 13:52:38 +00:00			`; CHECK-NOT: movap`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. llvm-svn: 40015 2007-07-18 20:23:34 +00:00
Add nounwind. llvm-svn: 50837 2008-05-07 22:59:08 +00:00			`define void @foo(<4 x float>* %p, <4 x float> %x) nounwind {`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. llvm-svn: 40015 2007-07-18 20:23:34 +00:00			`store <4 x float> %x, <4 x float>* %p`
			`ret void`
			`}`
Add nounwind. llvm-svn: 50837 2008-05-07 22:59:08 +00:00			`define void @bar(<2 x double>* %p, <2 x double> %x) nounwind {`
Implement initial memory alignment awareness for SSE instructions. Vector loads and stores that have a specified alignment of less than 16 bytes now use instructions that support misaligned memory references. llvm-svn: 40015 2007-07-18 20:23:34 +00:00			`store <2 x double> %x, <2 x double>* %p`
			`ret void`
			`}`