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llvm-mirror/test/MC/ARM/neont2-mul-encoding.s

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Fix misspelled target triples in MC/ARM test commands. llvm-svn: 121901
2010-12-15 23:14:01 +01:00
@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
.code 16
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.i8 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.i8 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.i16 d16, d16, d17 @ encoding: [0x50,0xef,0xb1,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.i16 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.i32 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.f32 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x0d]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.f32 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.i8 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.i8 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.i16 q8, q8, q9 @ encoding: [0x50,0xef,0xf2,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.i16 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.i32 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.f32 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x0d]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.f32 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.p8 d16, d16, d17 @ encoding: [0x40,0xff,0xb1,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.p8 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmul.p8 q8, q8, q9
ARM vmul assembly parsing for the lane index operand. llvm-svn: 142381
2011-10-18 20:01:52 +02:00
vmul.i16 d18, d8, d0[3]
@ CHECK: vmul.i16 d18, d8, d0[3] @ encoding: [0xd8,0xef,0x68,0x28]
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqdmulh.s16 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqdmulh.s32 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xef,0xe2,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqdmulh.s16 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqdmulh.s32 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqrdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xff,0xa1,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqrdmulh.s16 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqrdmulh.s32 d16, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqrdmulh.s16 q8, q8, q9 @ encoding: [0x50,0xff,0xe2,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqrdmulh.s16 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x0b]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqrdmulh.s32 q8, q8, q9
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0c]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmull.s8 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0c]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmull.s16 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0c]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmull.s32 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmull.u8 q8, d16, d17 @ encoding: [0xc0,0xff,0xa1,0x0c]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmull.u8 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmull.u16 q8, d16, d17 @ encoding: [0xd0,0xff,0xa1,0x0c]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmull.u16 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmull.u32 q8, d16, d17 @ encoding: [0xe0,0xff,0xa1,0x0c]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmull.u32 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vmull.p8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0e]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vmull.p8 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqdmull.s16 q8, d16, d17 @ encoding: [0xd0,0xef,0xa1,0x0d]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqdmull.s16 q8, d16, d17
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848
2010-12-03 23:31:40 +01:00
@ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d]
Flesh out tests for Thumb2 encodings of NEON instructions. llvm-svn: 118837
2010-11-11 22:15:47 +01:00
vqdmull.s32 q8, d16, d17
Add several FIXME cases for ARM encodings. llvm-svn: 142377
2011-10-18 19:50:22 +02:00
ARM vmul assembly parsing for the lane index operand. llvm-svn: 142381
2011-10-18 20:01:52 +02:00
@ vmla.i32 q12, q8, d3[0]
@ vqdmulh.s16 d11, d2, d3[0]
Add several FIXME cases for ARM encodings. llvm-svn: 142377
2011-10-18 19:50:22 +02:00
@ FIXME: vmla.i32 q12, q8, d3[0] @ encoding: [0xe0,0xff,0xc3,0x80]
@ FIXME: vqdmulh.s16 d11, d2, d3[0] @ encoding: [0x92,0xef,0x43,0xbc]
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