llvm-mirror/test/CodeGen/Mips/uitofp.ll

; RUN: llc -march=mips -mattr=+single-float < %s

define void @f0() nounwind {
entry:
  %b = alloca i32, align 4
  %a = alloca float, align 4
  store volatile i32 1, i32* %b, align 4
  %0 = load volatile i32, i32* %b, align 4
  %conv = uitofp i32 %0 to float
  store float %conv, float* %a, align 4
  ret void
}
Fix bug 13532. In SelectionDAGLegalize::ExpandLegalINT_TO_FP, expand INT_TO_FP nodes without using any f64 operations if f64 is not a legal type. Patch by Stefan Kristiansson. llvm-svn: 162728 2012-08-28 04:12:42 +02:00			`; RUN: llc -march=mips -mattr=+single-float < %s`

			`define void @f0() nounwind {`
			`entry:`
			`%b = alloca i32, align 4`
			`%a = alloca float, align 4`
			`store volatile i32 1, i32* %b, align 4`
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=\|:\|^)\sload (?:atomic )?(?:volatile )?(.?))(\| addrspace\(\d+\) )\($\| (?:%\|@\|null\|undef\|blockaddress\|getelementptr\|addrspacecast\|bitcast\|inttoptr\|\[\[[a-zA-Z]\|\{\{).$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794 2015-02-27 22:17:42 +01:00			`%0 = load volatile i32, i32* %b, align 4`
Fix bug 13532. In SelectionDAGLegalize::ExpandLegalINT_TO_FP, expand INT_TO_FP nodes without using any f64 operations if f64 is not a legal type. Patch by Stefan Kristiansson. llvm-svn: 162728 2012-08-28 04:12:42 +02:00			`%conv = uitofp i32 %0 to float`
			`store float %conv, float* %a, align 4`
			`ret void`
			`}`