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llvm-mirror/docs/AMDGPU/gfx908_src32_3.rst

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[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
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[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX9 subtargets: - gfx900; - gfx902; - gfx904; - gfx906; - gfx908; - gfx909.
2019-12-25 15:51:53 +01:00
.. _amdgpu_synid908_src32_3:
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX9 subtargets: - gfx900; - gfx902; - gfx904; - gfx906; - gfx908; - gfx909.
2019-12-25 15:51:53 +01:00
src
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
===========================
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX9 subtargets: - gfx900; - gfx902; - gfx904; - gfx906; - gfx908; - gfx909.
2019-12-25 15:51:53 +01:00
Instruction input.
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of GFX9 subtargets: - gfx900; - gfx902; - gfx904; - gfx906; - gfx908; - gfx909.
2019-12-25 15:51:53 +01:00
*Size:* 1 dword.
[AMDGPU][MC][DOC] Updated AMD GPU assembler description Stage 2: added detailed description of operands See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572 llvm-svn: 349368
2018-12-17 18:38:11 +01:00
[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. Summary of changes: - added description of MTBUF instructions and format modifier; - described limitations of f16 inline constants when used with integer operands; - updated description of gfx9+ flat global addressing modes; - v_accvgpr_write_b32 src0 corrections (gfx908); - minor bugfixing and improvements.
2020-08-21 13:22:25 +02:00
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`constant<amdgpu_synid_constant>`
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