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llvm-mirror/test/MC/X86/3DNow.s

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Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
2011-07-28 01:22:03 +02:00
// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s
Implement support for the bizarre 3DNow! encoding (which is unlike anything else in X86), and add support for pavgusb. This is apparently the only instruction (other than movsx) that is preventing ffmpeg from building with clang. If someone else is interested in banging out the rest of the 3DNow! instructions, it should be quite easy now. llvm-svn: 115466
2010-10-03 20:08:05 +02:00
// PR8283
// CHECK: pavgusb %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbf]
pavgusb %mm2, %mm1
Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
2011-07-28 01:22:03 +02:00
// CHECK: pavgusb 9(%esi,%edx), %mm3 # encoding: [0x67,0x0f,0x0f,0x5c,0x16,0x09,0xbf]
Implement support for the bizarre 3DNow! encoding (which is unlike anything else in X86), and add support for pavgusb. This is apparently the only instruction (other than movsx) that is preventing ffmpeg from building with clang. If someone else is interested in banging out the rest of the 3DNow! instructions, it should be quite easy now. llvm-svn: 115466
2010-10-03 20:08:05 +02:00
pavgusb 9(%esi,%edx), %mm3
what the heck, add support for the rest of the 3dNow! binary operations. llvm-svn: 115467
2010-10-03 20:24:18 +02:00
// CHECK: pf2id %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1d]
pf2id %mm2, %mm1
Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
2011-07-28 01:22:03 +02:00
// CHECK: pf2id 9(%esi,%edx), %mm3 # encoding: [0x67,0x0f,0x0f,0x5c,0x16,0x09,0x1d]
what the heck, add support for the rest of the 3dNow! binary operations. llvm-svn: 115467
2010-10-03 20:24:18 +02:00
pf2id 9(%esi,%edx), %mm3
// CHECK: pfacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xae]
pfacc %mm2, %mm1
// CHECK: pfadd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9e]
pfadd %mm2, %mm1
// CHECK: pfcmpeq %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb0]
pfcmpeq %mm2, %mm1
// CHECK: pfcmpge %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x90]
pfcmpge %mm2, %mm1
// CHECK: pfcmpgt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa0]
pfcmpgt %mm2, %mm1
// CHECK: pfmax %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa4]
pfmax %mm2, %mm1
// CHECK: pfmin %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x94]
pfmin %mm2, %mm1
// CHECK: pfmul %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb4]
pfmul %mm2, %mm1
// CHECK: pfrcp %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x96]
pfrcp %mm2, %mm1
// CHECK: pfrcpit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa6]
pfrcpit1 %mm2, %mm1
// CHECK: pfrcpit2 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb6]
pfrcpit2 %mm2, %mm1
// CHECK: pfrsqit1 %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xa7]
pfrsqit1 %mm2, %mm1
// CHECK: pfrsqrt %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x97]
pfrsqrt %mm2, %mm1
// CHECK: pfsub %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x9a]
pfsub %mm2, %mm1
// CHECK: pfsubr %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xaa]
pfsubr %mm2, %mm1
// CHECK: pi2fd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0d]
pi2fd %mm2, %mm1
// CHECK: pmulhrw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xb7]
pmulhrw %mm2, %mm1
add support for the prefetch/prefetchw instructions, move femms into the right file. The assembler supports all the 3dnow instructions now, but not the "3dnowa" ones. llvm-svn: 115468
2010-10-03 20:42:30 +02:00
// CHECK: femms # encoding: [0x0f,0x0e]
femms
// CHECK: prefetch (%rax) # encoding: [0x0f,0x0d,0x00]
// CHECK: prefetchw (%rax) # encoding: [0x0f,0x0d,0x08]
prefetch (%rax)
prefetchw (%rax)
Add 3DNowA instructions. llvm-svn: 115477
2010-10-03 22:23:13 +02:00
// CHECK: pf2iw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x1c]
pf2iw %mm2, %mm1
// CHECK: pi2fw %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x0c]
pi2fw %mm2, %mm1
// CHECK: pfnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8a]
pfnacc %mm2, %mm1
// CHECK: pfpnacc %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0x8e]
pfpnacc %mm2, %mm1
// CHECK: pswapd %mm2, %mm1 # encoding: [0x0f,0x0f,0xca,0xbb]
pswapd %mm2, %mm1
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