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llvm-mirror/test/MC/X86/x86_errors.s

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MC/X86/AsmParser: Give an explicit error message when we reject an instruction because it could have an ambiguous suffix. llvm-svn: 110890
2010-08-12 02:55:42 +02:00
// RUN: not llvm-mc -triple x86_64-unknown-unknown %s 2> %t.err
Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
2011-07-28 01:22:03 +02:00
// RUN: FileCheck --check-prefix=64 < %t.err %s
MC/X86/AsmParser: Give an explicit error message when we reject an instruction because it could have an ambiguous suffix. llvm-svn: 110890
2010-08-12 02:55:42 +02:00
Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
2011-07-28 01:22:03 +02:00
// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t.err
// RUN: FileCheck --check-prefix=32 < %t.err %s
// rdar://8204588
// 64: error: ambiguous instructions require an explicit suffix (could be 'cmpb', 'cmpw', 'cmpl', or 'cmpq')
MC/X86/AsmParser: Give an explicit error message when we reject an instruction because it could have an ambiguous suffix. llvm-svn: 110890
2010-08-12 02:55:42 +02:00
cmp $0, 0(%eax)
Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 llvm-svn: 136292
2011-07-28 01:22:03 +02:00
// 32: error: register %rax is only available in 64-bit mode
addl $0, 0(%rax)
Finish supporting cpp #file/line comments in assembler for error messages. So for cpp pre-processed assembly we give correct filename and line numbers when reporting errors in assembly files when using clang and -integrated-as on .s files. rdar://8998895 llvm-svn: 141814
2011-10-12 23:38:39 +02:00
// 32: test.s:8:2: error: invalid instruction mnemonic 'movi'
# 8 "test.s"
movi $8,%eax
Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does. Enhance the X86 asmparser to produce ranges in the one case that was annoying me, for example: test.s:10:15: error: invalid operand for instruction movl 0(%rax), 0(%edx) ^~~~~~~ It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use ranges where appropriate if someone is interested. llvm-svn: 142106
2011-10-16 06:47:35 +02:00
movl 0(%rax), 0(%edx) // error: invalid operand for instruction
X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches. When an instruction as written requires 32-bit mode and we're assembling in 64-bit mode, or vice-versa, issue a more specific diagnostic about what's wrong. rdar://12700702 llvm-svn: 167937
2012-11-14 19:04:47 +01:00
// 32: error: instruction requires: 64-bit mode
Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and not depend on In32BitMode. Use the sysexitq mnemonic for the version with the REX.W prefix and only allow it only In64BitMode. rdar://9738584 llvm-svn: 143112
2011-10-27 19:40:41 +02:00
sysexitq
Add the missing call to Error when a bad X86 scale expression is parsed. llvm-svn: 152443
2012-03-09 23:24:10 +01:00
// rdar://10710167
// 64: error: expected scale expression
lea (%rsp, %rbp, $4), %rax
Added a missing error check for X86 assembly with mismatched base and index registers not both being 64-bit or both being 32-bit registers. llvm-svn: 152580
2012-03-12 22:32:09 +01:00
// rdar://10423777
// 64: error: index register is 32-bit, but base register is 64-bit
movq (%rsi,%ecx),%xmm0
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