llvm-mirror/test/MC/ARM/cpu-test.s

// RUN: not llvm-mc -o - -triple arm-gnueabi-freebsd11.0 < %s > %t 2> %t2
// RUN: FileCheck %s < %t
// RUN: FileCheck %s --check-prefix=CHECK-ERROR < %t2

// CHECK: .cpu cortex-a8
.cpu cortex-a8
// CHECK: dsb     sy
dsb
.cpu arm9       
// CHECK-ERROR: error: instruction requires: data-barriers
dsb
// CHECK-ERROR: error: Unknown CPU name
.cpu foobar
// CHECK: .cpu cortex-m3
.cpu cortex-m3
// CHECK: sub sp, #16
sub sp,#16
Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM .cpu parsing. Previously .cpu directive in ARM assembler didnt switch to the new CPU and therefore acted as a nop. This implemented real action for .cpu and eg. allows to assembler FreeBSD kernel with -integrated-as. llvm-svn: 223147 2014-12-02 21:03:22 +01:00			`// RUN: not llvm-mc -o - -triple arm-gnueabi-freebsd11.0 < %s > %t 2> %t2`
			`// RUN: FileCheck %s < %t`
			`// RUN: FileCheck %s --check-prefix=CHECK-ERROR < %t2`

			`// CHECK: .cpu cortex-a8`
			`.cpu cortex-a8`
			`// CHECK: dsb sy`
			`dsb`
			`.cpu arm9`
			`// CHECK-ERROR: error: instruction requires: data-barriers`
			`dsb`
			`// CHECK-ERROR: error: Unknown CPU name`
			`.cpu foobar`
[ARM] Fix subtarget feature set truncation when using .cpu directive This is a bug that was caused due to storing the feature bitset in a 32-bit variable when it is a 64-bit mask, discarding the top half of the feature set. llvm-svn: 228151 2015-02-04 17:23:24 +01:00			`// CHECK: .cpu cortex-m3`
			`.cpu cortex-m3`
			`// CHECK: sub sp, #16`
			`sub sp,#16`