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llvm-mirror/test/MC/WebAssembly/data-section.s

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[WebAssembly] Remove unimplemented-simd target feature Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature. Differential Revision: https://reviews.llvm.org/D98457
2021-03-18 18:23:12 +01:00
# RUN: llvm-mc -triple=wasm32-unknown-unknown -mattr=+simd128,+nontrapping-fptoint,+exception-handling < %s | FileCheck %s
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# Check that it converts to .o without errors:
[WebAssembly] Remove unimplemented-simd target feature Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature. Differential Revision: https://reviews.llvm.org/D98457
2021-03-18 18:23:12 +01:00
# RUN: llvm-mc -triple=wasm32-unknown-unknown -filetype=obj -mattr=+simd128,+nontrapping-fptoint,+exception-handling < %s | obj2yaml | FileCheck -check-prefixes=BIN,BIN32 %s
[WebAssembly] fixed wasm64 data segment init exp not 64-bit As defined in the spec: https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md Differential Revision: https://reviews.llvm.org/D95651
2021-01-29 01:38:24 +01:00
# Same again for wasm64
[WebAssembly] Remove unimplemented-simd target feature Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature. Differential Revision: https://reviews.llvm.org/D98457
2021-03-18 18:23:12 +01:00
# RUN: llvm-mc -triple=wasm64-unknown-unknown -mattr=+simd128,+nontrapping-fptoint,+exception-handling < %s | FileCheck %s
[WebAssembly] fixed wasm64 data segment init exp not 64-bit As defined in the spec: https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md Differential Revision: https://reviews.llvm.org/D95651
2021-01-29 01:38:24 +01:00
# Check that it converts to .o without errors:
[WebAssembly] Remove unimplemented-simd target feature Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature. Differential Revision: https://reviews.llvm.org/D98457
2021-03-18 18:23:12 +01:00
# RUN: llvm-mc -triple=wasm64-unknown-unknown -filetype=obj -mattr=+simd128,+nontrapping-fptoint,+exception-handling < %s | obj2yaml | FileCheck -check-prefixes=BIN,BIN64 %s
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# Minimal test for data sections.
test0:
.functype test0 () -> (i32)
i32.const .L.str
.Ltestlabel:
end_function
.section .rodata..L.str,"",@
.L.str:
.int8 100
.size .L.str, 1
# CHECK: .text
# CHECK-LABEL: test0:
# CHECK-NEXT: .functype test0 () -> (i32)
# CHECK-NEXT: i32.const .L.str
# CHECK-NEXT: .Ltestlabel:
# CHECK-NEXT: end_function
# CHECK: .section .rodata..L.str,"",@
# CHECK-NEXT:.L.str:
# CHECK-NEXT: .int8 100
# BIN: --- !WASM
# BIN-NEXT: FileHeader:
Reland "[lib/Support/YAMLTraits] - Don't print leading zeroes when dumping Hex8/Hex16/Hex32 types." (https://reviews.llvm.org/D90930). This reverts reverting commit fc40a03323a4b265ccbed34a07e281b13c5e8367 and fixes LLD (MachO/wasm) tests that failed previously.
2020-11-18 09:59:49 +01:00
# BIN-NEXT: Version: 0x1
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# BIN-NEXT: Sections:
# BIN-NEXT: - Type: TYPE
# BIN-NEXT: Signatures:
# BIN-NEXT: - Index: 0
# BIN-NEXT: ParamTypes: []
[WebAssembly] Allow multivalue signatures in object files Summary: Also changes the wasm YAML format to reflect the possibility of having multiple return types and to put the returns after the params for consistency with the binary encoding. Reviewers: aheejin, sbc100 Subscribers: dschuff, jgravelle-google, hiraditya, sunfish, arphaman, rupprecht, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69156 llvm-svn: 375283
2019-10-18 22:27:30 +02:00
# BIN-NEXT: ReturnTypes:
# BIN-NEXT: - I32
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# BIN-NEXT: - Type: IMPORT
# BIN-NEXT: Imports:
# BIN-NEXT: - Module: env
# BIN-NEXT: Field: __linear_memory
# BIN-NEXT: Kind: MEMORY
# BIN-NEXT: Memory:
[WebAssembly] fixed wasm64 data segment init exp not 64-bit As defined in the spec: https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md Differential Revision: https://reviews.llvm.org/D95651
2021-01-29 01:38:24 +01:00
# BIN64-NEXT: Flags: [ IS_64 ]
[WebAssembly] Rename WasmLimits::Initial to ::Minimum. NFC. This patch renames the "Initial" member of WasmLimits to the name used in the spec, "Minimum". In the core WebAssembly specification, the Limits data type has one required "min" member and one optional "max" member, indicating the minimum required size of the corresponding table or memory, and the maximum size, if any. Although the WebAssembly spec does instantiate locally-defined tables and memories with the initial size being equal to the minimum size, it can't impose such a requirement for imports. It doesn't make sense to require an initial size for a memory import, for example. The compiler can only sensibly express the minimum and maximum sizes. See https://github.com/WebAssembly/js-types/blob/master/proposals/js-types/Overview.md#naming-of-size-limits for a related discussion that agrees that the right name of "initial" is "minimum" when querying the type of a table or memory from JavaScript. (Of course it still makes sense for JS to speak in terms of an initial size when it explicitly instantiates memories and tables.) Differential Revision: https://reviews.llvm.org/D99186
2021-03-23 14:46:32 +01:00
# BIN-NEXT: Minimum: 0x1
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# BIN-NEXT: - Type: FUNCTION
# BIN-NEXT: FunctionTypes: [ 0 ]
[WebAssembly] Add DataCount section to object files Summary: This ensures that object files will continue to validate as WebAssembly modules in the presence of bulk memory operations. Engines that don't support bulk memory operations will not recognize the DataCount section and will report validation errors, but that's ok because object files aren't supposed to be run directly anyway. Reviewers: aheejin, dschuff, sbc100 Subscribers: jgravelle-google, hiraditya, sunfish, rupprecht, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60623 llvm-svn: 358315
2019-04-13 00:27:48 +02:00
# BIN-NEXT: - Type: DATACOUNT
# BIN-NEXT: Count: 1
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# BIN-NEXT: - Type: CODE
# BIN-NEXT: Relocations:
# BIN-NEXT: - Type: R_WASM_MEMORY_ADDR_SLEB
# BIN-NEXT: Index: 1
Reland "[lib/Support/YAMLTraits] - Don't print leading zeroes when dumping Hex8/Hex16/Hex32 types." (https://reviews.llvm.org/D90930). This reverts reverting commit fc40a03323a4b265ccbed34a07e281b13c5e8367 and fixes LLD (MachO/wasm) tests that failed previously.
2020-11-18 09:59:49 +01:00
# BIN-NEXT: Offset: 0x4
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# BIN-NEXT: Functions:
# BIN-NEXT: - Index: 0
# BIN-NEXT: Locals: []
# BIN-NEXT: Body: 4180808080000B
# BIN-NEXT: - Type: DATA
# BIN-NEXT: Segments:
# BIN-NEXT: - SectionOffset: 6
# BIN-NEXT: InitFlags: 0
# BIN-NEXT: Offset:
[WebAssembly] fixed wasm64 data segment init exp not 64-bit As defined in the spec: https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md Differential Revision: https://reviews.llvm.org/D95651
2021-01-29 01:38:24 +01:00
# BIN32-NEXT: Opcode: I32_CONST
# BIN64-NEXT: Opcode: I64_CONST
[WebAssembly] Add support for data sections in the assembler. Summary: This is quite minimal so far, introduce them with .section, fill them with .int8 or .asciz, end with .size Reviewers: dschuff, sbc100, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58660 llvm-svn: 355321
2019-03-04 18:18:04 +01:00
# BIN-NEXT: Value: 0
# BIN-NEXT: Content: '64'
# BIN-NEXT: - Type: CUSTOM
# BIN-NEXT: Name: linking
# BIN-NEXT: Version: 2
# BIN-NEXT: SymbolTable:
# BIN-NEXT: - Index: 0
# BIN-NEXT: Kind: FUNCTION
# BIN-NEXT: Name: test0
# BIN-NEXT: Flags: [ BINDING_LOCAL ]
# BIN-NEXT: Function: 0
# BIN-NEXT: - Index: 1
# BIN-NEXT: Kind: DATA
# BIN-NEXT: Name: .L.str
# BIN-NEXT: Flags: [ BINDING_LOCAL ]
# BIN-NEXT: Segment: 0
# BIN-NEXT: Size: 1
# BIN-NEXT: SegmentInfo:
# BIN-NEXT: - Index: 0
# BIN-NEXT: Name: .rodata..L.str
# BIN-NEXT: Alignment: 0
# BIN-NEXT: Flags: [ ]
# BIN-NEXT: ...
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