2014-07-23 22:46:32 +02:00
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; RUN: llc < %s -asm-verbose=false -mtriple=arm64-apple-ios | FileCheck %s
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AArch64: Constant fold converting vector setcc results to float.
Since the result of a SETCC for AArch64 is 0 or -1 in each lane, we can
move unary operations, in this case [su]int_to_fp through the mask
operation and constant fold the operation away. Generally speaking:
UNARYOP(AND(VECTOR_CMP(x,y), constant))
--> AND(VECTOR_CMP(x,y), constant2)
where constant2 is UNARYOP(constant).
This implements the transform where UNARYOP is [su]int_to_fp.
For example, consider the simple function:
define <4 x float> @foo(<4 x float> %val, <4 x float> %test) nounwind {
%cmp = fcmp oeq <4 x float> %val, %test
%ext = zext <4 x i1> %cmp to <4 x i32>
%result = sitofp <4 x i32> %ext to <4 x float>
ret <4 x float> %result
}
Before this change, the code is generated as:
fcmeq.4s v0, v0, v1
movi.4s v1, #0x1 // Integer splat value.
and.16b v0, v0, v1 // Mask lanes based on the comparison.
scvtf.4s v0, v0 // Convert each lane to f32.
ret
After, the code is improved to:
fcmeq.4s v0, v0, v1
fmov.4s v1, #1.00000000 // f32 splat value.
and.16b v0, v0, v1 // Mask lanes based on the comparison.
ret
The svvtf.4s has been constant folded away and the floating point 1.0f
vector lanes are materialized directly via fmov.4s.
Rather than do the folding manually in the target code, teach getNode()
in the generic SelectionDAG to handle folding constant operands of
vector [su]int_to_fp nodes. It is reasonable (as noted in a FIXME) to do
additional constant folding there as well, but I don't have test cases
for those operations, so leaving them for another time when it becomes
appropriate.
rdar://17693791
llvm-svn: 213341
2014-07-18 02:40:52 +02:00
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define <4 x float> @foo(<4 x float> %val, <4 x float> %test) nounwind {
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; CHECK-LABEL: foo:
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; CHECK-NEXT: fcmeq.4s v0, v0, v1
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; CHECK-NEXT: fmov.4s v1, #1.00000000
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; CHECK-NEXT: and.16b v0, v0, v1
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; CHECK-NEXT: ret
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%cmp = fcmp oeq <4 x float> %val, %test
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%ext = zext <4 x i1> %cmp to <4 x i32>
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%result = sitofp <4 x i32> %ext to <4 x float>
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ret <4 x float> %result
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}
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2014-07-23 22:41:38 +02:00
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; Make sure the operation doesn't try to get folded when the sizes don't match,
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; as that ends up crashing later when trying to form a bitcast operation for
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; the folded nodes.
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define void @foo1(<4 x float> %val, <4 x float> %test, <4 x double>* %p) nounwind {
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; CHECK-LABEL: foo1:
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; CHECK: movi.4s
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; CHECK: scvtf.2d
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; CHECK: scvtf.2d
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%cmp = fcmp oeq <4 x float> %val, %test
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%ext = zext <4 x i1> %cmp to <4 x i32>
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%result = sitofp <4 x i32> %ext to <4 x double>
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store <4 x double> %result, <4 x double>* %p
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ret void
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}
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2014-07-23 22:41:43 +02:00
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; Fold explicit AND operations when the constant isn't a splat of a single
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; scalar value like what the zext creates.
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define <4 x float> @foo2(<4 x float> %val, <4 x float> %test) nounwind {
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; CHECK-LABEL: lCPI2_0:
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; CHECK-NEXT: .long 1065353216
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; CHECK-NEXT: .long 0
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; CHECK-NEXT: .long 1065353216
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; CHECK-NEXT: .long 0
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; CHECK-LABEL: foo2:
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; CHECK: adrp x8, lCPI2_0@PAGE
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; CHECK: ldr q2, [x8, lCPI2_0@PAGEOFF]
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; CHECK-NEXT: fcmeq.4s v0, v0, v1
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; CHECK-NEXT: and.16b v0, v0, v2
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%cmp = fcmp oeq <4 x float> %val, %test
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%ext = zext <4 x i1> %cmp to <4 x i32>
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%and = and <4 x i32> %ext, <i32 255, i32 256, i32 257, i32 258>
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%result = sitofp <4 x i32> %and to <4 x float>
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ret <4 x float> %result
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}
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