2020-03-25 03:37:26 +01:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P9
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; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P8
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define <8 x i16> @mul(<8 x i16> %m, <8 x i16> %n) {
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; CHECK-LABEL: mul:
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; CHECK: # %bb.0: # %entry
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2020-03-26 03:18:44 +01:00
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; CHECK-NEXT: vxor 4, 4, 4
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2020-03-25 03:37:26 +01:00
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; CHECK-NEXT: vmladduhm 2, 2, 3, 4
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; CHECK-NEXT: blr
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entry:
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%0 = mul <8 x i16> %m, %n
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ret <8 x i16> %0
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}
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define <8 x i16> @madd(<8 x i16> %m, <8 x i16> %n, <8 x i16> %o) {
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; CHECK-LABEL: madd:
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; CHECK: # %bb.0: # %entry
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2020-03-26 03:18:44 +01:00
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; CHECK-NEXT: vmladduhm 2, 2, 3, 4
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2020-03-25 03:37:26 +01:00
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; CHECK-NEXT: blr
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entry:
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%0 = mul <8 x i16> %m, %n
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%1 = add <8 x i16> %0, %o
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ret <8 x i16> %1
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}
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