llvm-mirror/test/CodeGen/X86/2012-01-11-split-cv.ll

; RUN: llc < %s -march=x86 -mcpu=corei7-avx -mattr=+avx -mtriple=i686-pc-win32 | FileCheck %s

;CHECK-LABEL: add18i16:
define void @add18i16(<18 x i16>* nocapture sret %ret, <18 x i16>* %bp) nounwind {
;CHECK: vmovaps
  %b = load <18 x i16>* %bp, align 16
  %x = add <18 x i16> zeroinitializer, %b
  store <18 x i16> %x, <18 x i16>* %ret, align 16
;CHECK: ret
  ret void
}
On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used. When we load the v12i32 type, the GenWidenVectorLoads method generates two loads: v8i32 and v4i32 and attempts to use CONCAT_VECTORS to join them. In this fix I concat undef values to widen the smaller value. The test "widen_load-2.ll" also exposes this bug on AVX. llvm-svn: 147964 2012-01-11 21:19:17 +01:00			`; RUN: llc < %s -march=x86 -mcpu=corei7-avx -mattr=+avx -mtriple=i686-pc-win32 \| FileCheck %s`

Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change. All changes were made by the following bash script: find test/CodeGen -name ".ll" \| \ while read NAME; do echo "$NAME" grep -q "^; RUN: llc.debug" $NAME && continue grep -q "^; RUN:.llvm-objdump" $NAME && continue grep -q "^; RUN: opt." $NAME && continue TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]@\([A-Za-z0-9_]\)(.$/\1/p" < $NAME \| \ while read FUNC; do sed -i '' "s/;\([A-Za-z0-9_-]\)\([A-Za-z0-9_-]\):\( \)$FUNC[:] \$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME done This script catches a superset of the cases caught by the script associated with commit r186280. It initially found some false positives due to unusual constructs in a minority of tests; all such cases were disambiguated first in commit r186621. llvm-svn: 186624 2013-07-19 00:47:09 +02:00			`;CHECK-LABEL: add18i16:`
On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used. When we load the v12i32 type, the GenWidenVectorLoads method generates two loads: v8i32 and v4i32 and attempts to use CONCAT_VECTORS to join them. In this fix I concat undef values to widen the smaller value. The test "widen_load-2.ll" also exposes this bug on AVX. llvm-svn: 147964 2012-01-11 21:19:17 +01:00			`define void @add18i16(<18 x i16>* nocapture sret %ret, <18 x i16>* %bp) nounwind {`
On Sandybridge split unaligned 256bit stores into two xmm-sized stores. llvm-svn: 172894 2013-01-19 09:38:41 +01:00			`;CHECK: vmovaps`
On AVX, we can load v8i32 at a time. The bug happens when two uneven loads are used. When we load the v12i32 type, the GenWidenVectorLoads method generates two loads: v8i32 and v4i32 and attempts to use CONCAT_VECTORS to join them. In this fix I concat undef values to widen the smaller value. The test "widen_load-2.ll" also exposes this bug on AVX. llvm-svn: 147964 2012-01-11 21:19:17 +01:00			`%b = load <18 x i16>* %bp, align 16`
			`%x = add <18 x i16> zeroinitializer, %b`
			`store <18 x i16> %x, <18 x i16>* %ret, align 16`
			`;CHECK: ret`
			`ret void`
			`}`