llvm-mirror/test/CodeGen/ARM/2010-12-07-PEIBug.ll

; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s
; rdar://8728956

define hidden void @foo() nounwind ssp {
entry:
; CHECK: foo:
; CHECK: mov r7, sp
; CHECK-NEXT: vpush {d8}
; CHECK-NEXT: vpush {d10, d11}
  tail call void asm sideeffect "","~{d8},~{d10},~{d11}"() nounwind
; CHECK: vpop {d10, d11}
; CHECK-NEXT: vpop {d8}
  ret void
}

declare hidden float @bar() nounwind readnone ssp
Fix more places which should be checking for iOS, not darwin. llvm-svn: 147513 2012-01-04 02:55:04 +01:00			`; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 \| FileCheck %s`
Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal vpush instructions to save / restore VFP / NEON registers like this: vpush {d8,d10,d11} vpop {d8,d10,d11} vpush and vpop do not allow gaps in the register list. rdar://8728956 llvm-svn: 121197 2010-12-08 00:08:38 +01:00			`; rdar://8728956`

			`define hidden void @foo() nounwind ssp {`
			`entry:`
			`; CHECK: foo:`
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on register allocation by allowing all 32 D-registers to be used. Patch by Cameron Zwarich. llvm-svn: 152824 2012-03-15 19:49:02 +01:00			`; CHECK: mov r7, sp`
Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal vpush instructions to save / restore VFP / NEON registers like this: vpush {d8,d10,d11} vpop {d8,d10,d11} vpush and vpop do not allow gaps in the register list. rdar://8728956 llvm-svn: 121197 2010-12-08 00:08:38 +01:00			`; CHECK-NEXT: vpush {d8}`
			`; CHECK-NEXT: vpush {d10, d11}`
Use vmov.f32 to materialize f32 consts on ARM. This relaxes constraints on register allocation by allowing all 32 D-registers to be used. Patch by Cameron Zwarich. llvm-svn: 152824 2012-03-15 19:49:02 +01:00			`tail call void asm sideeffect "","~{d8},~{d10},~{d11}"() nounwind`
Fix a bad prologue / epilogue codegen bug where the compiler would emit illegal vpush instructions to save / restore VFP / NEON registers like this: vpush {d8,d10,d11} vpop {d8,d10,d11} vpush and vpop do not allow gaps in the register list. rdar://8728956 llvm-svn: 121197 2010-12-08 00:08:38 +01:00			`; CHECK: vpop {d10, d11}`
			`; CHECK-NEXT: vpop {d8}`
			`ret void`
			`}`

			`declare hidden float @bar() nounwind readnone ssp`