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57 lines
1.7 KiB
LLVM
57 lines
1.7 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr9 \
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; RUN: -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
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; Function Attrs: nounwind readnone
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define <4 x i32> @test1(i8* %a) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lxvw4x v2, 0, r3
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; CHECK-NEXT: blr
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entry:
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%0 = tail call <4 x i32> @llvm.ppc.vsx.lxvw4x.be(i8* %a)
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ret <4 x i32> %0
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}
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; Function Attrs: nounwind readnone
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declare <4 x i32> @llvm.ppc.vsx.lxvw4x.be(i8*)
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; Function Attrs: nounwind readnone
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define <2 x double> @test2(i8* %a) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lxvd2x v2, 0, r3
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; CHECK-NEXT: blr
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entry:
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%0 = tail call <2 x double> @llvm.ppc.vsx.lxvd2x.be(i8* %a)
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ret <2 x double> %0
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}
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; Function Attrs: nounwind readnone
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declare <2 x double> @llvm.ppc.vsx.lxvd2x.be(i8*)
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; Function Attrs: nounwind readnone
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define void @test3(<4 x i32> %a, i8* %b) {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: stxvw4x v2, 0, r5
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; CHECK-NEXT: blr
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entry:
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tail call void @llvm.ppc.vsx.stxvw4x.be(<4 x i32> %a, i8* %b)
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ret void
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}
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; Function Attrs: nounwind readnone
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declare void @llvm.ppc.vsx.stxvw4x.be(<4 x i32>, i8*)
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; Function Attrs: nounwind readnone
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define void @test4(<2 x double> %a, i8* %b) {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: stxvd2x v2, 0, r5
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; CHECK-NEXT: blr
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entry:
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tail call void @llvm.ppc.vsx.stxvd2x.be(<2 x double> %a, i8* %b)
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ret void
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}
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; Function Attrs: nounwind readnone
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declare void @llvm.ppc.vsx.stxvd2x.be(<2 x double>, i8*)
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