2013-06-24 15:19:59 +02:00
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s
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2013-03-29 00:41:26 +01:00
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declare {i16, i32} @llvm.x86.rdseed.16()
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declare {i32, i32} @llvm.x86.rdseed.32()
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declare {i64, i32} @llvm.x86.rdseed.64()
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define i32 @_rdseed16_step(i16* %random_val) {
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%call = call {i16, i32} @llvm.x86.rdseed.16()
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%randval = extractvalue {i16, i32} %call, 0
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store i16 %randval, i16* %random_val
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%isvalid = extractvalue {i16, i32} %call, 1
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ret i32 %isvalid
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2013-07-14 08:24:09 +02:00
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; CHECK-LABEL: _rdseed16_step:
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2013-03-29 00:41:26 +01:00
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; CHECK: rdseedw %ax
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2013-06-25 04:48:58 +02:00
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; CHECK: movw %ax, (%r[[A0:di|cx]])
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2013-03-29 00:41:26 +01:00
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; CHECK: movzwl %ax, %ecx
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; CHECK: movl $1, %eax
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; CHECK: cmovael %ecx, %eax
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; CHECK: ret
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}
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define i32 @_rdseed32_step(i32* %random_val) {
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%call = call {i32, i32} @llvm.x86.rdseed.32()
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%randval = extractvalue {i32, i32} %call, 0
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store i32 %randval, i32* %random_val
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%isvalid = extractvalue {i32, i32} %call, 1
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ret i32 %isvalid
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2013-07-14 08:24:09 +02:00
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; CHECK-LABEL: _rdseed32_step:
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2013-03-29 00:41:26 +01:00
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; CHECK: rdseedl %e[[T0:[a-z]+]]
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2013-06-25 04:48:58 +02:00
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; CHECK: movl %e[[T0]], (%r[[A0]])
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2013-03-29 00:41:26 +01:00
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; CHECK: movl $1, %eax
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; CHECK: cmovael %e[[T0]], %eax
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; CHECK: ret
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}
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define i32 @_rdseed64_step(i64* %random_val) {
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%call = call {i64, i32} @llvm.x86.rdseed.64()
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%randval = extractvalue {i64, i32} %call, 0
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store i64 %randval, i64* %random_val
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%isvalid = extractvalue {i64, i32} %call, 1
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ret i32 %isvalid
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2013-07-14 08:24:09 +02:00
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; CHECK-LABEL: _rdseed64_step:
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2013-03-29 00:41:26 +01:00
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; CHECK: rdseedq %r[[T1:[a-z]+]]
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2013-06-25 04:48:58 +02:00
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; CHECK: movq %r[[T1]], (%r[[A0]])
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2013-03-29 00:41:26 +01:00
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; CHECK: movl $1, %eax
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; CHECK: cmovael %e[[T1]], %eax
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; CHECK: ret
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}
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