llvm-mirror/include/llvm/Support/RISCVTargetParser.def

#ifndef PROC_ALIAS
#define PROC_ALIAS(NAME, RV32, RV64)
#endif

PROC_ALIAS("generic", "generic-rv32", "generic-rv64")
PROC_ALIAS("rocket", "rocket-rv32", "rocket-rv64")
PROC_ALIAS("sifive-7-series", "sifive-7-rv32", "sifive-7-rv64")

#undef PROC_ALIAS

#ifndef PROC
#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)
#endif

PROC(INVALID, {"invalid"}, FK_INVALID, {""})
PROC(GENERIC_RV32, {"generic-rv32"}, FK_NONE, {""})
PROC(GENERIC_RV64, {"generic-rv64"}, FK_64BIT, {""})
PROC(ROCKET_RV32, {"rocket-rv32"}, FK_NONE, {""})
PROC(ROCKET_RV64, {"rocket-rv64"}, FK_64BIT, {""})
PROC(SIFIVE_732, {"sifive-7-rv32"}, FK_NONE, {""})
PROC(SIFIVE_764, {"sifive-7-rv64"}, FK_64BIT, {""})
PROC(SIFIVE_E31, {"sifive-e31"}, FK_NONE, {"rv32imac"})
PROC(SIFIVE_U54, {"sifive-u54"}, FK_64BIT, {"rv64gc"})
PROC(SIFIVE_E76, {"sifive-e76"}, FK_NONE, {"rv32imafc"})
PROC(SIFIVE_U74, {"sifive-u74"}, FK_64BIT, {"rv64gc"})

#undef PROC
[RISCV] Add -mtune support - The goal of this patch is improve option compatible with RISCV-V GCC, -mcpu support on GCC side will sent patch in next few days. - -mtune only affect the pipeline model and non-arch/extension related target feature, e.g. instruction fusion; in td file it called TuneFeatures, which is introduced by X86 back-end[1]. - -mtune accept all valid option for -mcpu and extra alias processor option, e.g. `generic`, `rocket` and `sifive-7-series`, the purpose is option compatible with RISCV-V GCC. - Processor alias for -mtune will resolve according the current target arch, rv32 or rv64, e.g. `rocket` will resolve to `rocket-rv32` or `rocket-rv64`. - Interaction between -mcpu and -mtune: * -mtune has higher priority than -mcpu for pipeline model and TuneFeatures. [1] https://reviews.llvm.org/D85165 Reviewed By: luismarques Differential Revision: https://reviews.llvm.org/D89025 2020-10-06 08:33:43 +02:00			`#ifndef PROC_ALIAS`
			`#define PROC_ALIAS(NAME, RV32, RV64)`
			`#endif`

[RISCV] Fix -Wbraced-scalar-init after D89025 2020-10-16 08:29:11 +02:00			`PROC_ALIAS("generic", "generic-rv32", "generic-rv64")`
			`PROC_ALIAS("rocket", "rocket-rv32", "rocket-rv64")`
			`PROC_ALIAS("sifive-7-series", "sifive-7-rv32", "sifive-7-rv64")`
[RISCV] Add -mtune support - The goal of this patch is improve option compatible with RISCV-V GCC, -mcpu support on GCC side will sent patch in next few days. - -mtune only affect the pipeline model and non-arch/extension related target feature, e.g. instruction fusion; in td file it called TuneFeatures, which is introduced by X86 back-end[1]. - -mtune accept all valid option for -mcpu and extra alias processor option, e.g. `generic`, `rocket` and `sifive-7-series`, the purpose is option compatible with RISCV-V GCC. - Processor alias for -mtune will resolve according the current target arch, rv32 or rv64, e.g. `rocket` will resolve to `rocket-rv32` or `rocket-rv64`. - Interaction between -mcpu and -mtune: * -mtune has higher priority than -mcpu for pipeline model and TuneFeatures. [1] https://reviews.llvm.org/D85165 Reviewed By: luismarques Differential Revision: https://reviews.llvm.org/D89025 2020-10-06 08:33:43 +02:00
			`#undef PROC_ALIAS`

[RISCV] Add support for -mcpu option. Summary: 1. gcc uses `-march` and `-mtune` flag to chose arch and pipeline model, but clang does not have `-mtune` flag, we uses `-mcpu` to chose both infos. 2. Add SiFive e31 and u54 cpu which have default march and pipeline model. 3. Specific `-mcpu` with rocket-rv[32\|64] would select pipeline model only, and use the driver's arch choosing logic to get default arch. Reviewers: lenary, asb, evandro, HsiangKai Reviewed By: lenary, asb, evandro Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D71124 2020-07-16 19:32:01 +02:00			`#ifndef PROC`
			`#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)`
			`#endif`

			`PROC(INVALID, {"invalid"}, FK_INVALID, {""})`
			`PROC(GENERIC_RV32, {"generic-rv32"}, FK_NONE, {""})`
			`PROC(GENERIC_RV64, {"generic-rv64"}, FK_64BIT, {""})`
			`PROC(ROCKET_RV32, {"rocket-rv32"}, FK_NONE, {""})`
			`PROC(ROCKET_RV64, {"rocket-rv64"}, FK_64BIT, {""})`
[RISCV] Fix broken test Fix test for the SiFive E76 core. This patch fixes the issue introduced by the commit 5d6d8a2769. 2020-10-06 02:20:59 +02:00			`PROC(SIFIVE_732, {"sifive-7-rv32"}, FK_NONE, {""})`
			`PROC(SIFIVE_764, {"sifive-7-rv64"}, FK_64BIT, {""})`
[RISCV] Add support for -mcpu option. Summary: 1. gcc uses `-march` and `-mtune` flag to chose arch and pipeline model, but clang does not have `-mtune` flag, we uses `-mcpu` to chose both infos. 2. Add SiFive e31 and u54 cpu which have default march and pipeline model. 3. Specific `-mcpu` with rocket-rv[32\|64] would select pipeline model only, and use the driver's arch choosing logic to get default arch. Reviewers: lenary, asb, evandro, HsiangKai Reviewed By: lenary, asb, evandro Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D71124 2020-07-16 19:32:01 +02:00			`PROC(SIFIVE_E31, {"sifive-e31"}, FK_NONE, {"rv32imac"})`
			`PROC(SIFIVE_U54, {"sifive-u54"}, FK_64BIT, {"rv64gc"})`
[RISCV] Add SiFive cores to the CPU option Add the SiFive cores E76 and U74 using the SiFive 7 series microarchitecture. Differential Revision: https://reviews.llvm.org/D88759 2020-10-02 23:44:32 +02:00			`PROC(SIFIVE_E76, {"sifive-e76"}, FK_NONE, {"rv32imafc"})`
			`PROC(SIFIVE_U74, {"sifive-u74"}, FK_64BIT, {"rv64gc"})`
[RISCV] Add support for -mcpu option. Summary: 1. gcc uses `-march` and `-mtune` flag to chose arch and pipeline model, but clang does not have `-mtune` flag, we uses `-mcpu` to chose both infos. 2. Add SiFive e31 and u54 cpu which have default march and pipeline model. 3. Specific `-mcpu` with rocket-rv[32\|64] would select pipeline model only, and use the driver's arch choosing logic to get default arch. Reviewers: lenary, asb, evandro, HsiangKai Reviewed By: lenary, asb, evandro Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D71124 2020-07-16 19:32:01 +02:00
			`#undef PROC`