2013-02-19 19:55:36 +01:00
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; RUN: llc < %s -mtriple=thumbv7s-apple-ios6.0.0 -verify-machineinstrs
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; Check to make sure the tail-call return at the end doesn't use a
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; callee-saved register. Register hinting from t2LDRDri was getting this
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; wrong. The intervening call will force allocation to try a high register
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; first, so the hint will attempt to fire, but must be rejected due to
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; not being in the allocation order for the tcGPR register class.
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; The machine instruction verifier will make sure that all actually worked
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; out the way it's supposed to.
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%"myclass" = type { %struct.foo }
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%struct.foo = type { i32, [40 x i8] }
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define hidden void @func(i8* %Data) nounwind ssp {
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%1 = getelementptr inbounds i8* %Data, i32 12
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%2 = bitcast i8* %1 to %"myclass"*
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tail call void @abc(%"myclass"* %2) nounwind
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tail call void @def(%"myclass"* %2) nounwind
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%3 = getelementptr inbounds i8* %Data, i32 8
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%4 = bitcast i8* %3 to i8**
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2013-04-30 19:52:57 +02:00
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%5 = load i8** %4, align 4
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2013-02-19 19:55:36 +01:00
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tail call void @ghi(i8* %5) nounwind
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%6 = bitcast i8* %Data to void (i8*)**
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2013-04-30 19:52:57 +02:00
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%7 = load void (i8*)** %6, align 4
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2013-02-19 19:55:36 +01:00
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%8 = getelementptr inbounds i8* %Data, i32 4
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%9 = bitcast i8* %8 to i8**
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2013-04-30 19:52:57 +02:00
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%10 = load i8** %9, align 4
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2013-02-19 19:55:36 +01:00
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%11 = icmp eq i8* %Data, null
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br i1 %11, label %14, label %12
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; <label>:12 ; preds = %0
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%13 = tail call %"myclass"* @jkl(%"myclass"* %2) nounwind
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tail call void @mno(i8* %Data) nounwind
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br label %14
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; <label>:14 ; preds = %12, %0
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tail call void %7(i8* %10) nounwind
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ret void
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}
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declare void @mno(i8*)
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declare void @def(%"myclass"*)
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declare void @abc(%"myclass"*)
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declare void @ghi(i8*)
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declare %"myclass"* @jkl(%"myclass"*) nounwind
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