llvm-mirror/test/MC/ARM/ldrd-strd-gnu-thumb-bad-regs.s

@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s

.text
.thumb
@ CHECK: error: invalid instruction
@ CHECK:         ldrd    r12, [r0, #512]
        ldrd    r12, [r0, #512]

@ CHECK: error: invalid instruction
@ CHECK:         strd    r12, [r0, #512]
        strd    r12, [r0, #512]
Fix for PR18921 (LDRD/STRD part):: Removed "GNU Assembler extension (compatibility)" definitions from ARMInstrInfo.td Fixed ARMAsmParser::ParseInstruction GNU compatability branch, so it also works for thumb mode from now. Added new tests. llvm-svn: 205622 2014-04-04 12:17:56 +02:00			`@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 \| FileCheck %s`
[ARM, Asm] Add diagnostics for general-purpose register operands This adds diagnostic strings for the ARM general-purpose register classes, which will be used when these classes are expected by the assembler, but the provided operand is not valid. One of these, rGPR, requires C++ code to select the correct error message, as that class contains different registers in pre-v8 and v8 targets. The rest can all have their diagnostic strings stored in the tablegen description of them. Differential revision: https://reviews.llvm.org/D36692 llvm-svn: 315303 2017-10-10 14:31:53 +02:00
Fix for PR18921 (LDRD/STRD part):: Removed "GNU Assembler extension (compatibility)" definitions from ARMInstrInfo.td Fixed ARMAsmParser::ParseInstruction GNU compatability branch, so it also works for thumb mode from now. Added new tests. llvm-svn: 205622 2014-04-04 12:17:56 +02:00			`.text`
			`.thumb`
[ARM, Asm] Harden GNU LDRD/STRD aliases against invalid inputs Previously, the code that implemented the GNU assembler aliases for the LDRD and STRD instructions (where the second register is omitted) assumed that the input was a valid instruction. This caused assertion failures for every example in ldrd-strd-gnu-bad-inst.s. This improves this code so that it bails out if the instruction is not in the expected format, the check bails out, and the asm parser is run on the unmodified instruction. It also relaxes the alias on thumb targets, so that unaligned pairs of registers can be used. The restriction that Rt must be even-numbered only applies to the ARM versions of these instructions. Differential revision: https://reviews.llvm.org/D36732 llvm-svn: 315305 2017-10-10 14:38:22 +02:00			`@ CHECK: error: invalid instruction`
Fix for PR18921 (LDRD/STRD part):: Removed "GNU Assembler extension (compatibility)" definitions from ARMInstrInfo.td Fixed ARMAsmParser::ParseInstruction GNU compatability branch, so it also works for thumb mode from now. Added new tests. llvm-svn: 205622 2014-04-04 12:17:56 +02:00			`@ CHECK: ldrd r12, [r0, #512]`
			`ldrd r12, [r0, #512]`

[ARM, Asm] Harden GNU LDRD/STRD aliases against invalid inputs Previously, the code that implemented the GNU assembler aliases for the LDRD and STRD instructions (where the second register is omitted) assumed that the input was a valid instruction. This caused assertion failures for every example in ldrd-strd-gnu-bad-inst.s. This improves this code so that it bails out if the instruction is not in the expected format, the check bails out, and the asm parser is run on the unmodified instruction. It also relaxes the alias on thumb targets, so that unaligned pairs of registers can be used. The restriction that Rt must be even-numbered only applies to the ARM versions of these instructions. Differential revision: https://reviews.llvm.org/D36732 llvm-svn: 315305 2017-10-10 14:38:22 +02:00			`@ CHECK: error: invalid instruction`
Fix for PR18921 (LDRD/STRD part):: Removed "GNU Assembler extension (compatibility)" definitions from ARMInstrInfo.td Fixed ARMAsmParser::ParseInstruction GNU compatability branch, so it also works for thumb mode from now. Added new tests. llvm-svn: 205622 2014-04-04 12:17:56 +02:00			`@ CHECK: strd r12, [r0, #512]`
			`strd r12, [r0, #512]`