2013-06-03 19:40:18 +02:00
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
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2013-10-10 19:11:46 +02:00
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; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
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2013-06-03 19:40:18 +02:00
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; R600-CHECK: @ngroups_x
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[0].X
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @ngroups_x
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 0
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @ngroups_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.ngroups.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @ngroups_y
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[0].Y
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @ngroups_y
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 1
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @ngroups_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.ngroups.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @ngroups_z
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[0].Z
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @ngroups_z
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 2
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @ngroups_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.ngroups.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @global_size_x
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[0].W
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @global_size_x
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 3
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @global_size_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.global.size.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @global_size_y
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[1].X
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @global_size_y
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 4
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @global_size_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.global.size.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @global_size_z
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[1].Y
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @global_size_z
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 5
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @global_size_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.global.size.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @local_size_x
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[1].Z
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @local_size_x
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 6
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @local_size_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.local.size.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @local_size_y
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[1].W
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @local_size_y
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 7
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @local_size_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.local.size.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @local_size_z
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2013-08-16 03:11:46 +02:00
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; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]]
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2013-09-04 21:53:46 +02:00
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; R600-CHECK: MOV [[VAL]], KC0[2].X
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2013-06-03 19:40:18 +02:00
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; SI-CHECK: @local_size_z
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; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 8
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]]
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @local_size_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.local.size.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; The tgid values are stored in SGPRs offset by the number of user SGPRs.
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; Currently we always use exactly 2 user SGPRs for the pointer to the
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; kernel arguments, but this may change in the future.
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; SI-CHECK: @tgid_x
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR2
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @tgid_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tgid.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; SI-CHECK: @tgid_y
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR3
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @tgid_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tgid.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; SI-CHECK: @tgid_z
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; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR4
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; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]]
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define void @tgid_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tgid.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; SI-CHECK: @tidig_x
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; SI-CHECK: BUFFER_STORE_DWORD VGPR0
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define void @tidig_x (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tidig.x() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; SI-CHECK: @tidig_y
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; SI-CHECK: BUFFER_STORE_DWORD VGPR1
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define void @tidig_y (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tidig.y() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; SI-CHECK: @tidig_z
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; SI-CHECK: BUFFER_STORE_DWORD VGPR2
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define void @tidig_z (i32 addrspace(1)* %out) {
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entry:
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%0 = call i32 @llvm.r600.read.tidig.z() #0
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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declare i32 @llvm.r600.read.ngroups.x() #0
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declare i32 @llvm.r600.read.ngroups.y() #0
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declare i32 @llvm.r600.read.ngroups.z() #0
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declare i32 @llvm.r600.read.global.size.x() #0
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declare i32 @llvm.r600.read.global.size.y() #0
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declare i32 @llvm.r600.read.global.size.z() #0
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declare i32 @llvm.r600.read.local.size.x() #0
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declare i32 @llvm.r600.read.local.size.y() #0
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declare i32 @llvm.r600.read.local.size.z() #0
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declare i32 @llvm.r600.read.tgid.x() #0
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declare i32 @llvm.r600.read.tgid.y() #0
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declare i32 @llvm.r600.read.tgid.z() #0
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declare i32 @llvm.r600.read.tidig.x() #0
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declare i32 @llvm.r600.read.tidig.y() #0
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declare i32 @llvm.r600.read.tidig.z() #0
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attributes #0 = { readnone }
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