llvm-mirror/test/CodeGen/X86/alloca-align-rounding.ll

; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux -enable-misched=false | FileCheck %s

declare void @bar(<2 x i64>* %n)

define void @foo(i64 %h) {
  %p = alloca <2 x i64>, i64 %h
  call void @bar(<2 x i64>* %p)
  ret void
; CHECK: foo
; CHECK-NOT: andq $-32, %rax
}

define void @foo2(i64 %h) {
  %p = alloca <2 x i64>, i64 %h, align 32
  call void @bar(<2 x i64>* %p)
  ret void
; CHECK: foo2
; CHECK: andq $-32, %rsp
; CHECK: andq $-32, %rax
}
Enable MI Sched for x86. This changes the SelectionDAG scheduling preference to source order. Soon, the SelectionDAG scheduler can be bypassed saving a nice chunk of compile time. Performance differences that result from this change are often a consequence of register coalescing. The register coalescer is far from perfect. Bugs can be filed for deficiencies. On x86 SandyBridge/Haswell, the source order schedule is often preserved, particularly for small blocks. Register pressure is generally improved over the SD scheduler's ILP mode. However, we are still able to handle large blocks that require latency hiding, unlike the SD scheduler's BURR mode. MI scheduler also attempts to discover the critical path in single-block loops and adjust heuristics accordingly. The MI scheduler relies on the new machine model. This is currently unimplemented for AVX, so we may not be generating the best code yet. Unit tests are updated so they don't depend on SD scheduling heuristics. llvm-svn: 192750 2013-10-16 01:33:07 +02:00			`; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux -enable-misched=false \| FileCheck %s`
It's not necessary to do rounding for alloca operations when the requested alignment is equal to the stack alignment. llvm-svn: 40004 2007-07-18 18:29:46 +02:00
			`declare void @bar(<2 x i64>* %n)`

Eliminate the restriction that the array size in an alloca must be i32. This will help reduce the amount of casting required on 64-bit targets. llvm-svn: 104911 2010-05-28 03:14:11 +02:00			`define void @foo(i64 %h) {`
			`%p = alloca <2 x i64>, i64 %h`
It's not necessary to do rounding for alloca operations when the requested alignment is equal to the stack alignment. llvm-svn: 40004 2007-07-18 18:29:46 +02:00			`call void @bar(<2 x i64>* %p)`
			`ret void`
FileCheckize tests. llvm-svn: 159044 2012-06-23 01:04:02 +02:00			`; CHECK: foo`
			`; CHECK-NOT: andq $-32, %rax`
It's not necessary to do rounding for alloca operations when the requested alignment is equal to the stack alignment. llvm-svn: 40004 2007-07-18 18:29:46 +02:00			`}`
Update test: dynamic_stackalloc size must be rounded to ensure stack ptr be left in a valid state. llvm-svn: 41134 2007-08-17 01:51:28 +02:00
Eliminate the restriction that the array size in an alloca must be i32. This will help reduce the amount of casting required on 64-bit targets. llvm-svn: 104911 2010-05-28 03:14:11 +02:00			`define void @foo2(i64 %h) {`
			`%p = alloca <2 x i64>, i64 %h, align 32`
Update test: dynamic_stackalloc size must be rounded to ensure stack ptr be left in a valid state. llvm-svn: 41134 2007-08-17 01:51:28 +02:00			`call void @bar(<2 x i64>* %p)`
			`ret void`
FileCheckize tests. llvm-svn: 159044 2012-06-23 01:04:02 +02:00			`; CHECK: foo2`
Add support for dynamic stack realignment in the presence of dynamic allocas on X86. Basically, this is a reapplication of r158087 with a few fixes. Specifically, (1) the stack pointer is restored from the base pointer before popping callee-saved registers and (2) in obscure cases (see comments in patch) we must cache the value of the original stack adjustment in the prologue and apply it in the epilogue. rdar://11496434 llvm-svn: 160002 2012-07-10 19:45:53 +02:00			`; CHECK: andq $-32, %rsp`
FileCheckize tests. llvm-svn: 159044 2012-06-23 01:04:02 +02:00			`; CHECK: andq $-32, %rax`
Update test: dynamic_stackalloc size must be rounded to ensure stack ptr be left in a valid state. llvm-svn: 41134 2007-08-17 01:51:28 +02:00			`}`