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llvm-mirror/test/MC/COFF/cv-fpo-csrs.s

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[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
# RUN: llvm-mc -filetype=asm < %s -triple i686-windows-msvc | FileCheck %s --check-prefix=ASM
[llvm-readobj] Update tests because of changes in llvm-readobj behavior This patch updates tests using llvm-readobj and llvm-readelf, because soon reading from stdin will be achievable only via a '-' as described here: https://bugs.llvm.org/show_bug.cgi?id=46400. Patch with changes to llvm-readobj behavior is here: https://reviews.llvm.org/D83704 Differential Revision: https://reviews.llvm.org/D83912 Reviewed by: jhenderson, MaskRay, grimar
2020-07-20 09:39:14 +02:00
# RUN: llvm-mc -filetype=obj < %s -triple i686-windows-msvc | llvm-readobj --codeview - | FileCheck %s --check-prefix=OBJ
[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
.globl _foo
_foo:
.cv_fpo_proc _foo 4
pushl %ebp
.cv_fpo_pushreg ebp # Test without %
pushl %ebx
.cv_fpo_pushreg %ebx
pushl %edi
.cv_fpo_pushreg %edi
pushl %esi
.cv_fpo_pushreg esi
subl $20, %esp
.cv_fpo_stackalloc 20
.cv_fpo_endprologue
# ASM: .cv_fpo_proc _foo 4
# ASM: pushl %ebp
# ASM: .cv_fpo_pushreg %ebp
# ASM: pushl %ebx
# ASM: .cv_fpo_pushreg %ebx
# ASM: pushl %edi
# ASM: .cv_fpo_pushreg %edi
# ASM: pushl %esi
# ASM: .cv_fpo_pushreg %esi
# ASM: subl $20, %esp
# ASM: .cv_fpo_stackalloc 20
# ASM: .cv_fpo_endprologue
# Clobbers
xorl %ebp, %ebp
xorl %ebx, %ebx
xorl %edi, %edi
xorl %esi, %esi
# Use that stack memory
leal 4(%esp), %eax
movl %eax, (%esp)
calll _bar
# ASM: calll _bar
# Epilogue
# FIXME: Get FPO data for this once we get it for DWARF.
addl $20, %esp
popl %esi
popl %edi
popl %ebx
popl %ebp
retl
.cv_fpo_endproc
# ASM: .cv_fpo_endproc
.section .debug$S,"dr"
.p2align 2
.long 4 # Debug section magic
.cv_fpo_data _foo
.cv_stringtable
# ASM: .cv_fpo_data
# OBJ: Subsection [
# OBJ-NEXT: SubSectionType: FrameData (0xF5)
# OBJ-NEXT: SubSectionSize: 0xC4
# OBJ-NEXT: LinkageName: _foo
# OBJ-NEXT: FrameData {
# OBJ-NEXT: RvaStart: 0x0
# OBJ-NEXT: CodeSize: 0x23
# OBJ-NEXT: LocalSize: 0x0
# OBJ-NEXT: ParamsSize: 0x4
# OBJ-NEXT: MaxStackSize: 0x0
# OBJ-NEXT: PrologSize: 0x7
# OBJ-NEXT: SavedRegsSize: 0x0
# OBJ-NEXT: Flags [ (0x4)
# OBJ-NEXT: IsFunctionStart (0x4)
# OBJ-NEXT: ]
[codeview] Improve readobj FPO dumper and pdbutil register names The improved dumping helps me investigate PR38857. llvm-svn: 341695
2018-09-07 20:48:27 +02:00
# OBJ-NEXT: FrameFunc [
# OBJ-NEXT: $T0 .raSearch =
# OBJ-NEXT: $eip $T0 ^ =
# OBJ-NEXT: $esp $T0 4 + =
# OBJ-NEXT: ]
[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
# OBJ-NEXT: }
# OBJ-NEXT: FrameData {
# OBJ-NEXT: RvaStart: 0x1
# OBJ-NEXT: CodeSize: 0x22
# OBJ-NEXT: LocalSize: 0x0
# OBJ-NEXT: ParamsSize: 0x4
# OBJ-NEXT: MaxStackSize: 0x0
# OBJ-NEXT: PrologSize: 0x6
# OBJ-NEXT: SavedRegsSize: 0x4
# OBJ-NEXT: Flags [ (0x0)
# OBJ-NEXT: ]
[codeview] Improve readobj FPO dumper and pdbutil register names The improved dumping helps me investigate PR38857. llvm-svn: 341695
2018-09-07 20:48:27 +02:00
# OBJ-NEXT: FrameFunc [
# OBJ-NEXT: $T0 .raSearch =
# OBJ-NEXT: $eip $T0 ^ =
# OBJ-NEXT: $esp $T0 4 + =
# OBJ-NEXT: $ebp $T0 4 - ^ =
# OBJ-NEXT: ]
[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
# OBJ-NEXT: }
# OBJ-NEXT: FrameData {
# OBJ-NEXT: RvaStart: 0x2
# OBJ-NEXT: CodeSize: 0x21
# OBJ-NEXT: LocalSize: 0x0
# OBJ-NEXT: ParamsSize: 0x4
# OBJ-NEXT: MaxStackSize: 0x0
# OBJ-NEXT: PrologSize: 0x5
# OBJ-NEXT: SavedRegsSize: 0x8
# OBJ-NEXT: Flags [ (0x0)
# OBJ-NEXT: ]
[codeview] Improve readobj FPO dumper and pdbutil register names The improved dumping helps me investigate PR38857. llvm-svn: 341695
2018-09-07 20:48:27 +02:00
# OBJ-NEXT: FrameFunc [
# OBJ-NEXT: $T0 .raSearch =
# OBJ-NEXT: $eip $T0 ^ =
# OBJ-NEXT: $esp $T0 4 + =
# OBJ-NEXT: $ebp $T0 4 - ^ =
# OBJ-NEXT: $ebx $T0 8 - ^ =
# OBJ-NEXT: ]
[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
# OBJ-NEXT: }
# OBJ-NEXT: FrameData {
# OBJ-NEXT: RvaStart: 0x3
# OBJ-NEXT: CodeSize: 0x20
# OBJ-NEXT: LocalSize: 0x0
# OBJ-NEXT: ParamsSize: 0x4
# OBJ-NEXT: MaxStackSize: 0x0
# OBJ-NEXT: PrologSize: 0x4
# OBJ-NEXT: SavedRegsSize: 0xC
# OBJ-NEXT: Flags [ (0x0)
# OBJ-NEXT: ]
[codeview] Improve readobj FPO dumper and pdbutil register names The improved dumping helps me investigate PR38857. llvm-svn: 341695
2018-09-07 20:48:27 +02:00
# OBJ-NEXT: FrameFunc [
# OBJ-NEXT: $T0 .raSearch =
# OBJ-NEXT: $eip $T0 ^ =
# OBJ-NEXT: $esp $T0 4 + =
# OBJ-NEXT: $ebp $T0 4 - ^ =
# OBJ-NEXT: $ebx $T0 8 - ^ =
# OBJ-NEXT: $edi $T0 12 - ^ =
# OBJ-NEXT: ]
[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
# OBJ-NEXT: }
# OBJ-NEXT: FrameData {
# OBJ-NEXT: RvaStart: 0x4
# OBJ-NEXT: CodeSize: 0x1F
# OBJ-NEXT: LocalSize: 0x0
# OBJ-NEXT: ParamsSize: 0x4
# OBJ-NEXT: MaxStackSize: 0x0
# OBJ-NEXT: PrologSize: 0x3
# OBJ-NEXT: SavedRegsSize: 0x10
# OBJ-NEXT: Flags [ (0x0)
# OBJ-NEXT: ]
[codeview] Improve readobj FPO dumper and pdbutil register names The improved dumping helps me investigate PR38857. llvm-svn: 341695
2018-09-07 20:48:27 +02:00
# OBJ-NEXT: FrameFunc [
# OBJ-NEXT: $T0 .raSearch =
# OBJ-NEXT: $eip $T0 ^ =
# OBJ-NEXT: $esp $T0 4 + =
# OBJ-NEXT: $ebp $T0 4 - ^ =
# OBJ-NEXT: $ebx $T0 8 - ^ =
# OBJ-NEXT: $edi $T0 12 - ^ =
# OBJ-NEXT: $esi $T0 16 - ^ =
# OBJ-NEXT: ]
[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
# OBJ-NEXT: }
# OBJ-NEXT: FrameData {
# OBJ-NEXT: RvaStart: 0x7
# OBJ-NEXT: CodeSize: 0x1C
# OBJ-NEXT: LocalSize: 0x14
# OBJ-NEXT: ParamsSize: 0x4
# OBJ-NEXT: MaxStackSize: 0x0
# OBJ-NEXT: PrologSize: 0x0
# OBJ-NEXT: SavedRegsSize: 0x10
# OBJ-NEXT: Flags [ (0x0)
# OBJ-NEXT: ]
[codeview] Improve readobj FPO dumper and pdbutil register names The improved dumping helps me investigate PR38857. llvm-svn: 341695
2018-09-07 20:48:27 +02:00
# OBJ-NEXT: FrameFunc [
# OBJ-NEXT: $T0 .raSearch =
# OBJ-NEXT: $eip $T0 ^ =
# OBJ-NEXT: $esp $T0 4 + =
# OBJ-NEXT: $ebp $T0 4 - ^ =
# OBJ-NEXT: $ebx $T0 8 - ^ =
# OBJ-NEXT: $edi $T0 12 - ^ =
# OBJ-NEXT: $esi $T0 16 - ^ =
# OBJ-NEXT: ]
[codeview] Implement FPO data assembler directives Summary: This adds a set of new directives that describe 32-bit x86 prologues. The directives are limited and do not expose the full complexity of codeview FPO data. They are merely a convenience for the compiler to generate more readable assembly so we don't need to generate tons of labels in CodeGen. If our prologue emission changes in the future, we can change the set of available directives to suit our needs. These are modelled after the .seh_ directives, which use a different format that interacts with exception handling. The directives are: .cv_fpo_proc _foo .cv_fpo_pushreg ebp/ebx/etc .cv_fpo_setframe ebp/esi/etc .cv_fpo_stackalloc 200 .cv_fpo_endprologue .cv_fpo_endproc .cv_fpo_data _foo I tried to follow the implementation of ARM EHABI CFI directives by sinking most directives out of MCStreamer and into X86TargetStreamer. This helps avoid polluting non-X86 code with WinCOFF specific logic. I used cdb to confirm that this can show locals in parent CSRs in a few cases, most importantly the one where we use ESI as a frame pointer, i.e. the one in http://crbug.com/756153#c28 Once we have cdb integration in debuginfo-tests, we can add integration tests there. Reviewers: majnemer, hans Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D38776 llvm-svn: 315513
2017-10-11 23:24:33 +02:00
# OBJ-NEXT: }
# OBJ-NOT: FrameData
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