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llvm-mirror/test/CodeGen/X86/sext-subreg.ll

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Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg. For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used. llvm-svn: 93278
2010-01-13 01:30:23 +01:00
; RUN: llc < %s -march=x86-64 | FileCheck %s
; rdar://7529457
define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
; CHECK: t:
As Dan pointed out, movzbl, movsbl, and friends are nicer than their alias (movzx/movsx) because they give more information. Revert that part of the patch. llvm-svn: 129498
2011-04-14 03:46:37 +02:00
; CHECK: movslq %e{{.*}}, %rax
Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg. For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used. llvm-svn: 93278
2010-01-13 01:30:23 +01:00
; CHECK: movq %rax
; CHECK: movl %eax
%C = add i64 %A, %B
%D = trunc i64 %C to i32
volatile store i32 %D, i32* %P
%E = shl i64 %C, 32
%F = ashr i64 %E, 32
volatile store i64 %F, i64 *%P2
volatile store i32 %D, i32* %P
ret i64 undef
}
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