2020-11-09 22:50:15 +01:00
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// Pattern Matchings for VEL Intrinsics
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// Define intrinsics written by hand
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2020-11-14 13:16:33 +01:00
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// The lsv and lvs patterns
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def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz),
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(LSVrr_v (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32),
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i64:$sz, v256f64:$pt)>;
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def : Pat<(int_ve_vl_lvsl_svs v256f64:$vx, i32:$sy),
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(LVSvr v256f64:$vx,
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(INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32))>;
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def : Pat<(int_ve_vl_lvsd_svs v256f64:$vx, i32:$sy),
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(LVSvr v256f64:$vx,
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(INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32))>;
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def : Pat<(int_ve_vl_lvss_svs v256f64:$vx, i32:$sy),
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(EXTRACT_SUBREG (LVSvr v256f64:$vx,
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(INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy,
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sub_i32)),
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sub_f32)>;
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2020-11-09 22:50:15 +01:00
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// Define intrinsics automatically generated
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include "VEInstrIntrinsicVL.gen.td"
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