llvm-mirror/test/CodeGen/ARM/store-prepostinc.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=arm-ldst-opt %s -o - | FileCheck %s

--- |
  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
  target triple = "thumbv7a-none-unknown-eabi"

  define i8* @STR_pre4(i8* %p, i32 %v) { unreachable }
  define i8* @STR_pre8(i8* %p, i32 %v) { unreachable }
  define i8* @STR_pre255(i8* %p, i32 %v) { unreachable }
  define i8* @STR_pre256(i8* %p, i32 %v) { unreachable }
  define i8* @STR_pre1024(i8* %p, i32 %v) { unreachable }
  define i8* @STR_pre4095(i8* %p, i32 %v) { unreachable }
  define i8* @STR_pre4096(i8* %p, i32 %v) { unreachable }
  define i8* @STR_prem1024(i8* %p, i32 %v) { unreachable }
  define i8* @STR_prem4095(i8* %p, i32 %v) { unreachable }
  define i8* @STR_prem4096(i8* %p, i32 %v) { unreachable }

  define i8* @STR_post4(i8* %p, i32 %v) { unreachable }
  define i8* @STR_post8(i8* %p, i32 %v) { unreachable }
  define i8* @STR_post255(i8* %p, i32 %v) { unreachable }
  define i8* @STR_post256(i8* %p, i32 %v) { unreachable }
  define i8* @STR_post1024(i8* %p, i32 %v) { unreachable }
  define i8* @STR_post4095(i8* %p, i32 %v) { unreachable }
  define i8* @STR_post4096(i8* %p, i32 %v) { unreachable }
  define i8* @STR_postm1024(i8* %p, i32 %v) { unreachable }
  define i8* @STR_postm4095(i8* %p, i32 %v) { unreachable }
  define i8* @STR_postm4096(i8* %p, i32 %v) { unreachable }

...
---
name:            STR_pre4
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_pre4
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_PRE_IMM killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_pre8
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_pre8
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_pre255
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_pre255
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_pre256
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_pre256
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_pre1024
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_pre1024
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_pre4095
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_pre4095
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw ADDri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_pre4096
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_pre4096
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_prem1024
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_prem1024
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_prem4095
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_prem4095
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw SUBri killed renamable $r0, 4095, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_prem4096
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_prem4096
    ; CHECK: liveins: $r0, $r1
    ; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...

---
name:            STR_post4
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_post4
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 4, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_post8
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_post8
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 8, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_post255
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_post255
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 255, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_post256
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_post256
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 256, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_post1024
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_post1024
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 1024, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_post4095
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_post4095
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 2095, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw ADDri killed renamable $r0, 2095, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_post4096
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_post4096
    ; CHECK: liveins: $r0, $r1
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw ADDri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_postm1024
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_postm1024
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 5120, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_postm4095
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_postm4095
    ; CHECK: liveins: $r0, $r1
    ; CHECK: early-clobber $r0 = STR_POST_IMM killed $r1, $r0, $noreg, 6191, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw SUBri killed renamable $r0, 2095, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...
---
name:            STR_postm4096
alignment:       4
tracksRegLiveness: true
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
body:             |
  bb.0 (%ir-block.0):
    liveins: $r0, $r1

    ; CHECK-LABEL: name: STR_postm4096
    ; CHECK: liveins: $r0, $r1
    ; CHECK: STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    ; CHECK: renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
    STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store 4)
    renamable $r0 = nuw SUBri killed renamable $r0, 4096, 14 /* CC::al */, $noreg, $noreg
    BX_RET 14 /* CC::al */, $noreg, implicit $r0

...