[gn build] Add build files for llvm/lib/Target/AArch64 + tests

The AArch64 target itself is similar to the X86 target in https://reviews.llvm.org/rL348903
The llvm-exegesis AArch64 bits are similar to the X86 bits in http://reviews.llvm.org/rL350184
The llvm-exegesis unittests AArch64 bits are similar to the X86 bits in https://reviews.llvm.org/rL350413

llvm/unittests/Target/AArch64 doesn't have an equivalent since the X86 Target
only has lit tests, no unittests.

Differential Revision: https://reviews.llvm.org/D56364

llvm-svn: 350499

utils/gn/secondary/llvm/lib/Target/AArch64/AsmParser/BUILD.gn

@@ -0,0 +1,24 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("AArch64GenAsmMatcher") {
+  visibility = [ ":AsmParser" ]
+  args = [ "-gen-asm-matcher" ]
+  td_file = "../AArch64.td"
+}
+
+static_library("AsmParser") {
+  output_name = "LLVMAArch64AsmParser"
+  deps = [
+    ":AArch64GenAsmMatcher",
+    "//llvm/lib/MC",
+    "//llvm/lib/MC/MCParser",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target/AArch64/MCTargetDesc",
+    "//llvm/lib/Target/AArch64/TargetInfo",
+    "//llvm/lib/Target/AArch64/Utils",
+  ]
+  include_dirs = [ ".." ]
+  sources = [
+    "AArch64AsmParser.cpp",
+  ]
+}

utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn

@@ -0,0 +1,122 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("AArch64GenCallingConv") {
+  visibility = [ ":LLVMAArch64CodeGen" ]
+  args = [ "-gen-callingconv" ]
+  td_file = "AArch64.td"
+}
+
+tablegen("AArch64GenDAGISel") {
+  visibility = [ ":LLVMAArch64CodeGen" ]
+  args = [ "-gen-dag-isel" ]
+  td_file = "AArch64.td"
+}
+
+tablegen("AArch64GenFastISel") {
+  visibility = [ ":LLVMAArch64CodeGen" ]
+  args = [ "-gen-fast-isel" ]
+  td_file = "AArch64.td"
+}
+
+tablegen("AArch64GenGlobalISel") {
+  visibility = [ ":LLVMAArch64CodeGen" ]
+  args = [ "-gen-global-isel" ]
+  td_file = "AArch64.td"
+}
+
+tablegen("AArch64GenMCPseudoLowering") {
+  visibility = [ ":LLVMAArch64CodeGen" ]
+  args = [ "-gen-pseudo-lowering" ]
+  td_file = "AArch64.td"
+}
+
+tablegen("AArch64GenRegisterBank") {
+  visibility = [ ":LLVMAArch64CodeGen" ]
+  args = [ "-gen-register-bank" ]
+  td_file = "AArch64.td"
+}
+
+static_library("LLVMAArch64CodeGen") {
+  deps = [
+    ":AArch64GenCallingConv",
+    ":AArch64GenDAGISel",
+    ":AArch64GenFastISel",
+    ":AArch64GenGlobalISel",
+    ":AArch64GenMCPseudoLowering",
+    ":AArch64GenRegisterBank",
+    "InstPrinter",
+    "MCTargetDesc",
+    "TargetInfo",
+    "Utils",
+    "//llvm/lib/Analysis",
+    "//llvm/lib/CodeGen",
+    "//llvm/lib/CodeGen/AsmPrinter",
+    "//llvm/lib/CodeGen/GlobalISel",
+    "//llvm/lib/CodeGen/SelectionDAG",
+    "//llvm/lib/IR",
+    "//llvm/lib/MC",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target",
+    "//llvm/lib/Transforms/Scalar",
+  ]
+  include_dirs = [ "." ]
+  sources = [
+    "AArch64A53Fix835769.cpp",
+    "AArch64A57FPLoadBalancing.cpp",
+    "AArch64AdvSIMDScalarPass.cpp",
+    "AArch64AsmPrinter.cpp",
+    "AArch64BranchTargets.cpp",
+    "AArch64CallLowering.cpp",
+    "AArch64CleanupLocalDynamicTLSPass.cpp",
+    "AArch64CollectLOH.cpp",
+    "AArch64CompressJumpTables.cpp",
+    "AArch64CondBrTuning.cpp",
+    "AArch64ConditionOptimizer.cpp",
+    "AArch64ConditionalCompares.cpp",
+    "AArch64DeadRegisterDefinitionsPass.cpp",
+    "AArch64ExpandPseudoInsts.cpp",
+    "AArch64FalkorHWPFFix.cpp",
+    "AArch64FastISel.cpp",
+    "AArch64FrameLowering.cpp",
+    "AArch64ISelDAGToDAG.cpp",
+    "AArch64ISelLowering.cpp",
+    "AArch64InstrInfo.cpp",
+    "AArch64InstructionSelector.cpp",
+    "AArch64LegalizerInfo.cpp",
+    "AArch64LoadStoreOptimizer.cpp",
+    "AArch64MCInstLower.cpp",
+    "AArch64MacroFusion.cpp",
+    "AArch64PBQPRegAlloc.cpp",
+    "AArch64PreLegalizerCombiner.cpp",
+    "AArch64PromoteConstant.cpp",
+    "AArch64RedundantCopyElimination.cpp",
+    "AArch64RegisterBankInfo.cpp",
+    "AArch64RegisterInfo.cpp",
+    "AArch64SIMDInstrOpt.cpp",
+    "AArch64SelectionDAGInfo.cpp",
+    "AArch64SpeculationHardening.cpp",
+    "AArch64StorePairSuppress.cpp",
+    "AArch64Subtarget.cpp",
+    "AArch64TargetMachine.cpp",
+    "AArch64TargetObjectFile.cpp",
+    "AArch64TargetTransformInfo.cpp",
+  ]
+}
+
+# This is a bit different from most build files: Due to this group
+# having the directory's name, "//llvm/lib/Target/AArch64" will refer to this
+# target, which pulls in the code in this directory *and all subdirectories*.
+# For most other directories, "//llvm/lib/Foo" only pulls in the code directly
+# in "llvm/lib/Foo". The forwarding targets in //llvm/lib/Target expect this
+# different behavior.
+group("AArch64") {
+  deps = [
+    ":LLVMAArch64CodeGen",
+    "AsmParser",
+    "Disassembler",
+    "InstPrinter",
+    "MCTargetDesc",
+    "TargetInfo",
+    "Utils",
+  ]
+}

utils/gn/secondary/llvm/lib/Target/AArch64/Disassembler/BUILD.gn

@@ -0,0 +1,25 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("AArch64GenDisassemblerTables") {
+  visibility = [ ":Disassembler" ]
+  args = [ "-gen-disassembler" ]
+  td_file = "../AArch64.td"
+}
+
+static_library("Disassembler") {
+  output_name = "LLVMAArch64Disassembler"
+  deps = [
+    ":AArch64GenDisassemblerTables",
+    "//llvm/lib/MC",
+    "//llvm/lib/MC/MCDisassembler",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target/AArch64/MCTargetDesc",
+    "//llvm/lib/Target/AArch64/TargetInfo",
+    "//llvm/lib/Target/AArch64/Utils",
+  ]
+  include_dirs = [ ".." ]
+  sources = [
+    "AArch64Disassembler.cpp",
+    "AArch64ExternalSymbolizer.cpp",
+  ]
+}

utils/gn/secondary/llvm/lib/Target/AArch64/InstPrinter/BUILD.gn

@@ -0,0 +1,35 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("AArch64GenAsmWriter") {
+  visibility = [ ":InstPrinter" ]
+  args = [ "-gen-asm-writer" ]
+  td_file = "../AArch64.td"
+}
+
+tablegen("AArch64GenAsmWriter1") {
+  visibility = [ ":InstPrinter" ]
+  args = [
+    "-gen-asm-writer",
+    "-asmwriternum=1",
+  ]
+  td_file = "../AArch64.td"
+}
+
+static_library("InstPrinter") {
+  output_name = "LLVMAArch64AsmPrinter"
+  deps = [
+    ":AArch64GenAsmWriter",
+    ":AArch64GenAsmWriter1",
+    "//llvm/lib/MC",
+    "//llvm/lib/Support",
+
+    # MCTargetDesc depends on InstPrinter, so we can't depend on the full
+    # MCTargetDesc target here: it would form a cycle.
+    "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen",
+    "//llvm/lib/Target/AArch64/Utils",
+  ]
+  include_dirs = [ ".." ]
+  sources = [
+    "AArch64InstPrinter.cpp",
+  ]
+}

utils/gn/secondary/llvm/lib/Target/AArch64/MCTargetDesc/BUILD.gn

@@ -0,0 +1,68 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("AArch64GenInstrInfo") {
+  visibility = [ ":tablegen" ]
+  args = [ "-gen-instr-info" ]
+  td_file = "../AArch64.td"
+}
+
+tablegen("AArch64GenMCCodeEmitter") {
+  visibility = [ ":tablegen" ]
+  args = [ "-gen-emitter" ]
+  td_file = "../AArch64.td"
+}
+
+tablegen("AArch64GenRegisterInfo") {
+  visibility = [ ":tablegen" ]
+  args = [ "-gen-register-info" ]
+  td_file = "../AArch64.td"
+}
+
+tablegen("AArch64GenSubtargetInfo") {
+  visibility = [ ":tablegen" ]
+  args = [ "-gen-subtarget" ]
+  td_file = "../AArch64.td"
+}
+
+group("tablegen") {
+  visibility = [
+    ":MCTargetDesc",
+    "../InstPrinter",
+    "../TargetInfo",
+    "../Utils",
+  ]
+  public_deps = [
+    ":AArch64GenInstrInfo",
+    ":AArch64GenMCCodeEmitter",
+    ":AArch64GenRegisterInfo",
+    ":AArch64GenSubtargetInfo",
+  ]
+}
+
+static_library("MCTargetDesc") {
+  output_name = "LLVMAArch64Desc"
+  public_deps = [
+    ":tablegen",
+  ]
+  deps = [
+    "//llvm/lib/MC",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target/AArch64/InstPrinter",
+    "//llvm/lib/Target/AArch64/TargetInfo",
+    "//llvm/lib/Target/AArch64/Utils",
+  ]
+  include_dirs = [ ".." ]
+  sources = [
+    "AArch64AsmBackend.cpp",
+    "AArch64ELFObjectWriter.cpp",
+    "AArch64ELFStreamer.cpp",
+    "AArch64MCAsmInfo.cpp",
+    "AArch64MCCodeEmitter.cpp",
+    "AArch64MCExpr.cpp",
+    "AArch64MCTargetDesc.cpp",
+    "AArch64MachObjectWriter.cpp",
+    "AArch64TargetStreamer.cpp",
+    "AArch64WinCOFFObjectWriter.cpp",
+    "AArch64WinCOFFStreamer.cpp",
+  ]
+}

utils/gn/secondary/llvm/lib/Target/AArch64/TargetInfo/BUILD.gn

@@ -0,0 +1,14 @@
+static_library("TargetInfo") {
+  output_name = "LLVMAArch64Info"
+  deps = [
+    "//llvm/lib/Support",
+
+    # MCTargetDesc depends on TargetInfo, so we can't depend on the full
+    # MCTargetDesc target here: it would form a cycle.
+    "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen",
+  ]
+  include_dirs = [ ".." ]
+  sources = [
+    "AArch64TargetInfo.cpp",
+  ]
+}

utils/gn/secondary/llvm/lib/Target/AArch64/Utils/BUILD.gn

@@ -0,0 +1,24 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("AArch64GenSystemOperands") {
+  visibility = [ ":Utils" ]
+  args = [ "-gen-searchable-tables" ]
+  td_file = "../AArch64.td"
+}
+
+static_library("Utils") {
+  output_name = "LLVMAArch64Utils"
+  public_deps = [
+    ":AArch64GenSystemOperands",
+  ]
+  deps = [
+    "//llvm/lib/Support",
+    "//llvm/lib/Target/AArch64/MCTargetDesc:tablegen",
+  ]
+
+  # AArch64BaseInfo.h includes a header from MCTargetDesc :-/
+  include_dirs = [ ".." ]
+  sources = [
+    "AArch64BaseInfo.cpp",
+  ]
+}

utils/gn/secondary/llvm/lib/Target/targets.gni

@@ -6,30 +6,40 @@ declare_args() {
 }
 
 if (llvm_targets_to_build == "host") {
-  if (host_cpu == "x86" || host_cpu == "x64") {
+  if (host_cpu == "arm64") {
+    llvm_targets_to_build = [ "AArch64" ]
+  } else if (host_cpu == "x86" || host_cpu == "x64") {
     llvm_targets_to_build = [ "X86" ]
   } else {
     assert(false, "add your host_cpu above")
   }
 } else if (llvm_targets_to_build == "all") {
   # FIXME: Port the remaining targets.
-  llvm_targets_to_build = [ "X86" ]
+  llvm_targets_to_build = [
+    "AArch64",
+    "X86",
+  ]
 }
 
 # Validate that llvm_targets_to_build is set to a list of valid targets,
 # and remember which targets are built.
+llvm_build_AArch64 = false
 llvm_build_X86 = false
 foreach(target, llvm_targets_to_build) {
-  if (target == "X86") {
+  if (target == "AArch64") {
+    llvm_build_AArch64 = true
+  } else if (target == "X86") {
     llvm_build_X86 = true
   } else {
-    #FIXME : Port the remaining targets.
+    # FIXME: Port the remaining targets.
     assert(false, "Unknown target '$target'.")
   }
 }
 
 # FIXME: This should be based off target_cpu once cross compiles work.
-if (host_cpu == "x86" || host_cpu == "x64") {
+if (host_cpu == "arm64") {
+  native_target = "AArch64"
+} else if (host_cpu == "x86" || host_cpu == "x64") {
   native_target = "X86"
 } else {
   assert(false, "Unsuppored host_cpu '$host_cpu'.")

utils/gn/secondary/llvm/tools/llvm-exegesis/lib/AArch64/BUILD.gn

@@ -0,0 +1,22 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("AArch64GenExegesis") {
+  args = [ "-gen-exegesis" ]
+  td_file = "//llvm/lib/Target/AArch64/AArch64.td"
+}
+
+static_library("AArch64") {
+  output_name = "LLVMExegesisAArch64"
+  deps = [
+    ":AArch64GenExegesis",
+
+    # Exegesis reaches inside the Target/AArch64 tablegen internals and must
+    # depend on these Target/AArch64-internal build targets.
+    "//llvm/lib/Target/AArch64/MCTargetDesc",
+    "//llvm/lib/Target/AArch64/Utils",
+  ]
+  sources = [
+    "Target.cpp",
+  ]
+  include_dirs = [ "//llvm/lib/Target/AArch64" ]
+}

utils/gn/secondary/llvm/unittests/BUILD.gn

@@ -45,13 +45,14 @@ group("unittests") {
   # FIXME: This matches how they are set up in the cmake build,
   # but if we disable an arch after building with it on, this
   # setup leaves behind stale executables.
-  # FIXME: Add AArch64, ARM these once the Targets exist.
-  #if (llvm_build_AArch64) {
-  #deps += [
-  #"Target/AArch64:AArch64Tests",
-  #"tools/llvm-exegesis/AArch64:LLVMExegesisAArch64Tests",
-  #]
-  #}
+  if (llvm_build_AArch64) {
+    deps += [
+      "Target/AArch64:AArch64Tests",
+      "tools/llvm-exegesis/AArch64:LLVMExegesisAArch64Tests",
+    ]
+  }
+
+  # FIXME: Add ARM once the Targets exists.
   #if (llvm_build_ARM) {
   #deps += [ "tools/llvm-exegesis/ARM:LLVMExegesisARMTests" ]
   #}

utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn

@@ -0,0 +1,20 @@
+import("//llvm/utils/unittest/unittest.gni")
+
+unittest("AArch64Tests") {
+  deps = [
+    "//llvm/lib/CodeGen",
+    "//llvm/lib/CodeGen/GlobalISel",
+    "//llvm/lib/CodeGen/MIRParser",
+    "//llvm/lib/CodeGen/SelectionDAG",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target",
+    "//llvm/lib/Target/AArch64:LLVMAArch64CodeGen",
+    "//llvm/lib/Target/AArch64/MCTargetDesc",
+    "//llvm/lib/Target/AArch64/TargetInfo",
+    "//llvm/lib/Target/AArch64/Utils",
+  ]
+  include_dirs = [ "//llvm/lib/Target/AArch64" ]
+  sources = [
+    "InstSizes.cpp",
+  ]
+}

utils/gn/secondary/llvm/unittests/tools/llvm-exegesis/AArch64/BUILD.gn

@@ -0,0 +1,25 @@
+import("//llvm/utils/unittest/unittest.gni")
+
+unittest("LLVMExegesisAArch64Tests") {
+  deps = [
+    "//llvm/lib/DebugInfo/Symbolize",
+    "//llvm/lib/MC",
+    "//llvm/lib/MC/MCParser",
+    "//llvm/lib/Object",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target/AArch64",
+
+    # Exegesis reaches inside the Target/AArch64 tablegen internals and must
+    # depend on this Target/AArch64-internal build target.
+    "//llvm/lib/Target/AArch64/MCTargetDesc",
+    "//llvm/tools/llvm-exegesis/lib",
+    "//llvm/tools/llvm-exegesis/lib/AArch64",
+  ]
+  include_dirs = [
+    "//llvm/lib/Target/AArch64",
+    "//llvm/tools/llvm-exegesis/lib",
+  ]
+  sources = [
+    "TargetTest.cpp",
+  ]
+}