mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-01 13:11:39 +01:00
Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. This
was turned up by some new SelectionDAG assertion checks that I'm working on. llvm-svn: 53687
This commit is contained in:
parent
7e1e10f7d2
commit
0025513482
@ -5070,9 +5070,8 @@ SDOperand DAGCombiner::XformToShuffleWithZero(SDNode *N) {
|
||||
&IdxOps[0], IdxOps.size()));
|
||||
SDOperand Result = DAG.getNode(ISD::VECTOR_SHUFFLE, VT,
|
||||
&Ops[0], Ops.size());
|
||||
if (VT != LHS.getValueType()) {
|
||||
Result = DAG.getNode(ISD::BIT_CONVERT, LHS.getValueType(), Result);
|
||||
}
|
||||
if (VT != N->getValueType(0))
|
||||
Result = DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0), Result);
|
||||
return Result;
|
||||
}
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user