* Minor cleanups

* Reduce number of #includes, sometimes drastically (LiveRangeInfo.h lost _7_)
* Move instrIsFeasible() from InstrScheduling.h to SchedPriorities.h
* Delete blank lines at end of files

llvm-svn: 1672

include/llvm/CodeGen/InstrScheduling.h

@@ -1,23 +1,15 @@
-// $Id$ -*- C++ -*-
+//===-- InstrScheduling.h - Interface To Instruction Scheduling --*- C++ -*-==//
-//***************************************************************************
-// File:
-//	InstrScheduling.h
 //
-// Purpose:
+// This file defines a minimal, but complete, interface to instruction
+// scheduling.
 //
-// History:
+//===----------------------------------------------------------------------===//
-//	7/23/01	 -  Vikram Adve  -  Created
-//***************************************************************************
 
 #ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H
 #define LLVM_CODEGEN_INSTR_SCHEDULING_H
 
-#include "llvm/CodeGen/MachineInstr.h"
-
 class Method;
-class SchedulingManager;
 class TargetMachine;
-class MachineSchedInfo;
 
 //---------------------------------------------------------------------------
 // Function: ScheduleInstructionsWithSSA
@@ -42,18 +34,6 @@ bool ScheduleInstructionsWithSSA(Method *M, const TargetMachine &Target);
 //---------------------------------------------------------------------------
 
 // Not implemented yet.
-bool		ScheduleInstructions		(Method* method,
+bool ScheduleInstructions(Method *M, const TargetMachine &Target);
-						 const TargetMachine &Target);
 
-//---------------------------------------------------------------------------
-// Function: instrIsFeasible
-// 
-// Purpose:
-//   Used by the priority analysis to filter out instructions
-//   that are not feasible to issue in the current cycle.
-//   Should only be used during schedule construction..
-//---------------------------------------------------------------------------
-
-bool		instrIsFeasible			(const SchedulingManager& S,
-						 MachineOpCode opCode);
 #endif

include/llvm/CodeGen/InstrSelectionSupport.h

@@ -16,12 +16,7 @@
 
 #include "llvm/Instruction.h"
 #include "llvm/CodeGen/MachineInstr.h"
-class Method;
-class InstrForest;
-class MachineInstr;
 class InstructionNode;
-class TmpInstruction;
-class Constant;
 class TargetMachine;
 
 
@@ -104,8 +99,8 @@ void		Set3OperandsFromInstr	(MachineInstr* minstr,
 // 
 //---------------------------------------------------------------------------
 
-MachineOperand::MachineOperandType
+MachineOperand::MachineOperandType ChooseRegOrImmed(
-		ChooseRegOrImmed        (Value* val,
+                                         Value* val,
                                          MachineOpCode opCode,
                                          const TargetMachine& targetMachine,
                                          bool canUseImmed,

include/llvm/CodeGen/RegAllocCommon.h

@@ -1,11 +1,10 @@
 
-#include "Support/CommandLine.h"
 
 #ifndef REG_ALLOC_COMMON_H
 #define  REG_ALLOC_COMMON_H
 
-// THIS IS NOW SPECIFIED VIA A COMMANDLINE ARGUMENT TO LLC
+#include "Support/CommandLine.h"
-//
+
 // set DEBUG_RA for printing out debug messages
 // if DEBUG_RA is 1 normal output messages
 // if DEBUG_RA is 2 extensive debug info for each instr

include/llvm/CodeGen/RegClass.h

@@ -10,12 +10,12 @@
 
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineRegInfo.h"
 #include <stack>
 #include <iostream>
+class MachineRegClassInfo;
 
-typedef std::vector<unsigned int> ReservedColorListType;
+typedef std::vector<unsigned> ReservedColorListType;
 
 
 //-----------------------------------------------------------------------------
@@ -35,14 +35,9 @@ typedef std::vector<unsigned int> ReservedColorListType;
 //   methods are called thru a register class.
 //
 //-----------------------------------------------------------------------------
-class RegClass
+class RegClass {
-{
-
- private:
   const Method *const Meth;             // Method we are working on
-
   const MachineRegClassInfo *const MRC; // corresponding MRC
-
   const unsigned RegClassID;            // my int ID
 
   InterferenceGraph IG;                 // Interference graph - constructed by

lib/CodeGen/RegAlloc/IGNode.h

@@ -28,6 +28,8 @@
 
 #include "llvm/CodeGen/RegAllocCommon.h"
 #include "llvm/CodeGen/LiveRange.h"
+class LiveRange;
+class RegClass;
 
 //----------------------------------------------------------------------------
 // Class IGNode
@@ -35,8 +37,7 @@
 // Represents a node in an interference graph.
 //----------------------------------------------------------------------------
 
-class IGNode
+class IGNode {
-{
   const int Index;            // index within IGNodeList 
 
   bool OnStack;               // this has been pushed on to stack for coloring
@@ -51,9 +52,7 @@ class IGNode
   // After that, never incremented/set again nor used.
 
   LiveRange *const ParentLR;  // parent LR (cannot be a const)
-
+public:
-
- public:
 
   // constructor
   //
@@ -117,8 +116,9 @@ class IGNode
   inline void setRegClass(RegClass *const RC) 
     { ParentLR->setRegClass(RC);  }
 
-  inline RegClass *const getRegClass() const 
+  inline RegClass *const getRegClass() const {
-    { return ParentLR->getRegClass(); } 
+    return ParentLR->getRegClass();
+  }
 
   inline bool hasColor() const 
     { return ParentLR->hasColor();  }

lib/CodeGen/RegAlloc/LiveRange.h

@@ -26,13 +26,9 @@ class IGNode;
 // of Values. 
 //----------------------------------------------------------------------------
 
-class LiveRange : public ValueSet
+class LiveRange : public ValueSet {
-{
- private:
-
   RegClass *MyRegClass;       // register classs (e.g., int, FP) for this LR
 
-
   bool doesSpanAcrossCalls;
   //
   // Does this live range span across calls? 
@@ -168,7 +164,7 @@ class LiveRange : public ValueSet
   }
   
   inline Type::PrimitiveID getTypeID() const {
-    return this->getType()->getPrimitiveID();
+    return getType()->getPrimitiveID();
   }
 
   inline void setSuggestedColor(int Col) {
@@ -176,8 +172,10 @@ class LiveRange : public ValueSet
 
     if(SuggestedColor == -1 )
       SuggestedColor = Col;
+#if 0
     else if (DEBUG_RA) 
       std::cerr << "Already has a suggested color " << Col << "\n";
+#endif
   }
 
   inline unsigned getSuggestedColor() const {
@@ -206,12 +204,6 @@ class LiveRange : public ValueSet
   inline unsigned getSpillCost() const {
     return SpillCost;
   }
-
 };
 
-
-
-
-
 #endif
-

lib/CodeGen/RegAlloc/LiveRangeInfo.h

@@ -1,44 +1,39 @@
-/* Title:   LiveRangeInfo.h  -*- C++ -*-
+//===-- LiveRangeInfo.h - Track all LiveRanges for a Method ------*- C++ -*-==//
-   Author:  Ruchira Sasanka
+//
-   Date:    Jun 30, 01
+// This file contains the class LiveRangeInfo which constructs and keeps 
-   Purpose: 
+// the LiveRangMap which contains all the live ranges used in a method.
-
+//
-   This file contains the class LiveRangeInfo which constructs and keeps 
+// Assumptions: 
-   the LiveRangMap which contains all the live ranges used in a method.
+//
-
+// All variables (llvm Values) are defined before they are used. However, a 
-   Assumptions: 
+// constant may not be defined in the machine instruction stream if it can be
-
+// used as an immediate value within a machine instruction. However, register
-   All variables (llvm Values) are defined before they are used. However, a 
+// allocation does not have to worry about immediate constants since they
-   constant may not be defined in the machine instruction stream if it can be
+// do not require registers.
-   used as an immediate value within a machine instruction. However, register
+//
-   allocation does not have to worry about immediate constants since they
+// Since an llvm Value has a list of uses associated, it is sufficient to
-   do not require registers.
+// record only the defs in a Live Range.
-
+//
-   Since an llvm Value has a list of uses associated, it is sufficient to
+//===----------------------------------------------------------------------===//
-   record only the defs in a Live Range.
-
-*/
-
 
 #ifndef LIVE_RANGE_INFO_H
 #define LIVE_RANGE_INFO_H
 
-#include "llvm/Type.h"
+#include "Support/HashExtras.h"
-#include "llvm/Method.h"
-#include "llvm/CodeGen/MachineInstr.h"
-
-#include "llvm/Analysis/LiveVar/LiveVarSet.h"
-
-#include "llvm/CodeGen/IGNode.h"
-#include "llvm/CodeGen/LiveRange.h"
-#include "llvm/CodeGen/RegClass.h"
 
+class LiveRange;
+class MachineInstr;
+class LiveVarSet;
+class RegClass;
+class MachineRegInfo;
+class TargetMachine;
+class Value;
+class Method;
+class Instruction;
 
 typedef std::hash_map<const Value*, LiveRange*> LiveRangeMapType;
 typedef std::vector<const MachineInstr*> CallRetInstrListType;
 
-
-
 //----------------------------------------------------------------------------
 // Class LiveRangeInfo
 //
@@ -46,13 +41,8 @@ typedef std::vector<const MachineInstr*> CallRetInstrListType;
 // ranges used in a method. Also contain methods to coalesce live ranges.
 //----------------------------------------------------------------------------
 
-class LiveRangeInfo 
+class LiveRangeInfo {
-{
-
-private:
-
   const Method *const Meth;         // Method for which live range info is held
-
   LiveRangeMapType  LiveRangeMap;   // A map from Value * to LiveRange * to 
                                     // record all live ranges in a method
                                     // created by constructLiveRanges
@@ -96,9 +86,9 @@ public:
   // in machine specific code) to the common live range map
   //
   inline void addLRToMap(const Value *Val, LiveRange *LR) {
-    assert( Val && LR && "Val/LR is NULL!\n");
+    assert(Val && LR && "Val/LR is NULL!\n");
-    assert( (! LiveRangeMap[ Val ]) && "LR already set in map");
+    assert((!LiveRangeMap[Val]) && "LR already set in map");
-    LiveRangeMap[ Val ] = LR;
+    LiveRangeMap[Val] = LR;
   }
   
   // return the common live range map for this method
@@ -109,7 +99,7 @@ public:
   // Method sed to get the corresponding live range of a Value
   //
   inline LiveRange *getLiveRangeForValue( const Value *const Val) 
-    { return LiveRangeMap[ Val ]; }
+    { return LiveRangeMap[Val]; }
 
   // Method used to get the Call and Return instruction list
   //
@@ -125,10 +115,6 @@ public:
   // debugging method to print the live ranges
   //
   void printLiveRanges();
-
 };
 
-
-
-
 #endif 

lib/CodeGen/RegAlloc/PhyRegAlloc.h

@@ -25,21 +25,19 @@
 
       PhyRegAlloc PRA(*MethodI, target, &LVI);     // allocate regs
       PRA.allocateRegisters();
-
-
-
 */ 
 
 #ifndef PHY_REG_ALLOC_H
 #define PHY_REG_ALLOC_H
 
-#include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/RegClass.h"
 #include "llvm/CodeGen/LiveRangeInfo.h"
-#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
 #include "llvm/Analysis/LoopDepth.h"
 #include <deque>
 class MachineCodeForMethod;
+class MachineRegInfo;
+class MethodLiveVarInfo;
+class MachineInstr;
 
 //----------------------------------------------------------------------------
 // Class AddedInstrns:

lib/CodeGen/RegAlloc/RegAllocCommon.h

@@ -1,11 +1,10 @@
 
-#include "Support/CommandLine.h"
 
 #ifndef REG_ALLOC_COMMON_H
 #define  REG_ALLOC_COMMON_H
 
-// THIS IS NOW SPECIFIED VIA A COMMANDLINE ARGUMENT TO LLC
+#include "Support/CommandLine.h"
-//
+
 // set DEBUG_RA for printing out debug messages
 // if DEBUG_RA is 1 normal output messages
 // if DEBUG_RA is 2 extensive debug info for each instr

lib/CodeGen/RegAlloc/RegClass.h

@@ -10,12 +10,12 @@
 
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/MachineRegInfo.h"
 #include <stack>
 #include <iostream>
+class MachineRegClassInfo;
 
-typedef std::vector<unsigned int> ReservedColorListType;
+typedef std::vector<unsigned> ReservedColorListType;
 
 
 //-----------------------------------------------------------------------------
@@ -35,14 +35,9 @@ typedef std::vector<unsigned int> ReservedColorListType;
 //   methods are called thru a register class.
 //
 //-----------------------------------------------------------------------------
-class RegClass
+class RegClass {
-{
-
- private:
   const Method *const Meth;             // Method we are working on
-
   const MachineRegClassInfo *const MRC; // corresponding MRC
-
   const unsigned RegClassID;            // my int ID
 
   InterferenceGraph IG;                 // Interference graph - constructed by