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[X86] Fix patterns for VPMULLD and VPCMPEQQ to not require aligned loads.

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llvm-svn: 283524
This commit is contained in:
Craig Topper 2016-10-07 06:54:43 +00:00
parent 4341a1c13b
commit 00daad258e
1 changed files with 2 additions and 2 deletions
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4
lib/Target/X86/X86InstrSSE.td
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@ -6906,10 +6906,10 @@ let Constraints = "$src1 = $dst" in {
let Predicates = [HasAVX, NoVLX] in {
defm VPMULLD : SS48I_binop_rm<0x40, "vpmulld", mul, v4i32, VR128,
memopv2i64, i128mem, 0, SSE_PMULLD_ITINS>,
loadv2i64, i128mem, 0, SSE_PMULLD_ITINS>,
VEX_4V;
defm VPCMPEQQ : SS48I_binop_rm<0x29, "vpcmpeqq", X86pcmpeq, v2i64, VR128,
memopv2i64, i128mem, 0, SSE_INTALU_ITINS_P>,
loadv2i64, i128mem, 0, SSE_INTALU_ITINS_P>,
VEX_4V;
}
let Predicates = [HasAVX2] in {