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[X86] Cleanup isel patterns to use 'vnot' instead of (xor X, immAllOnesV) to improve readability. NFC

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This commit is contained in:
Craig Topper 2021-01-31 18:46:55 -08:00
parent 43aea6efae
commit 00ea1c43c6
1 changed files with 22 additions and 22 deletions
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44
lib/Target/X86/X86InstrAVX512.td
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@ -3665,11 +3665,11 @@ def : Pat<(v16i32 (vselect VK16WM:$mask, (v16i32 immAllZerosV),
// These patterns exist to prevent the above patterns from introducing a second
// mask inversion when one already exists.
def : Pat<(v8i64 (vselect (xor VK8:$mask, (v8i1 immAllOnesV)),
def : Pat<(v8i64 (vselect (v8i1 (vnot VK8:$mask)),
(v8i64 immAllZerosV),
(v8i64 VR512:$src))),
(VMOVDQA64Zrrkz VK8:$mask, VR512:$src)>;
def : Pat<(v16i32 (vselect (xor VK16:$mask, (v16i1 immAllOnesV)),
def : Pat<(v16i32 (vselect (v16i1 (vnot VK16:$mask)),
(v16i32 immAllZerosV),
(v16i32 VR512:$src))),
(VMOVDQA32Zrrkz VK16WM:$mask, VR512:$src)>;
@ -11316,39 +11316,39 @@ defm VPTERNLOGQ : avx512_common_ternlog<"vpternlogq", SchedWriteVecALU,
// TODO: We should maybe have a more generalized algorithm for folding to
// vpternlog.
let Predicates = [HasAVX512] in {
def : Pat<(xor VR512:$src, (v64i8 immAllOnesV)),
def : Pat<(v64i8 (vnot VR512:$src)),
(VPTERNLOGQZrri VR512:$src, VR512:$src, VR512:$src, (i8 15))>;
def : Pat<(xor VR512:$src, (v32i16 immAllOnesV)),
def : Pat<(v32i16 (vnot VR512:$src)),
(VPTERNLOGQZrri VR512:$src, VR512:$src, VR512:$src, (i8 15))>;
def : Pat<(xor VR512:$src, (v16i32 immAllOnesV)),
def : Pat<(v16i32 (vnot VR512:$src)),
(VPTERNLOGQZrri VR512:$src, VR512:$src, VR512:$src, (i8 15))>;
def : Pat<(xor VR512:$src, (v8i64 immAllOnesV)),
def : Pat<(v8i64 (vnot VR512:$src)),
(VPTERNLOGQZrri VR512:$src, VR512:$src, VR512:$src, (i8 15))>;
}
let Predicates = [HasAVX512, NoVLX] in {
def : Pat<(xor VR128X:$src, (v16i8 immAllOnesV)),
def : Pat<(v16i8 (vnot VR128X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(i8 15)), sub_xmm)>;
def : Pat<(xor VR128X:$src, (v8i16 immAllOnesV)),
def : Pat<(v8i16 (vnot VR128X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(i8 15)), sub_xmm)>;
def : Pat<(xor VR128X:$src, (v4i32 immAllOnesV)),
def : Pat<(v4i32 (vnot VR128X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(i8 15)), sub_xmm)>;
def : Pat<(xor VR128X:$src, (v2i64 immAllOnesV)),
def : Pat<(v2i64 (vnot VR128X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
@ -11356,28 +11356,28 @@ let Predicates = [HasAVX512, NoVLX] in {
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src, sub_xmm),
(i8 15)), sub_xmm)>;
def : Pat<(xor VR256X:$src, (v32i8 immAllOnesV)),
def : Pat<(v32i8 (vnot VR256X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(i8 15)), sub_ymm)>;
def : Pat<(xor VR256X:$src, (v16i16 immAllOnesV)),
def : Pat<(v16i16 (vnot VR256X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(i8 15)), sub_ymm)>;
def : Pat<(xor VR256X:$src, (v8i32 immAllOnesV)),
def : Pat<(v8i32 (vnot VR256X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
(i8 15)), sub_ymm)>;
def : Pat<(xor VR256X:$src, (v4i64 immAllOnesV)),
def : Pat<(v4i64 (vnot VR256X:$src)),
(EXTRACT_SUBREG
(VPTERNLOGQZrri
(INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm),
@ -11387,22 +11387,22 @@ let Predicates = [HasAVX512, NoVLX] in {
}
let Predicates = [HasVLX] in {
def : Pat<(xor VR128X:$src, (v16i8 immAllOnesV)),
def : Pat<(v16i8 (vnot VR128X:$src)),
(VPTERNLOGQZ128rri VR128X:$src, VR128X:$src, VR128X:$src, (i8 15))>;
def : Pat<(xor VR128X:$src, (v8i16 immAllOnesV)),
def : Pat<(v8i16 (vnot VR128X:$src)),
(VPTERNLOGQZ128rri VR128X:$src, VR128X:$src, VR128X:$src, (i8 15))>;
def : Pat<(xor VR128X:$src, (v4i32 immAllOnesV)),
def : Pat<(v4i32 (vnot VR128X:$src)),
(VPTERNLOGQZ128rri VR128X:$src, VR128X:$src, VR128X:$src, (i8 15))>;
def : Pat<(xor VR128X:$src, (v2i64 immAllOnesV)),
def : Pat<(v2i64 (vnot VR128X:$src)),
(VPTERNLOGQZ128rri VR128X:$src, VR128X:$src, VR128X:$src, (i8 15))>;
def : Pat<(xor VR256X:$src, (v32i8 immAllOnesV)),
def : Pat<(v32i8 (vnot VR256X:$src)),
(VPTERNLOGQZ256rri VR256X:$src, VR256X:$src, VR256X:$src, (i8 15))>;
def : Pat<(xor VR256X:$src, (v16i16 immAllOnesV)),
def : Pat<(v16i16 (vnot VR256X:$src)),
(VPTERNLOGQZ256rri VR256X:$src, VR256X:$src, VR256X:$src, (i8 15))>;
def : Pat<(xor VR256X:$src, (v8i32 immAllOnesV)),
def : Pat<(v8i32 (vnot VR256X:$src)),
(VPTERNLOGQZ256rri VR256X:$src, VR256X:$src, VR256X:$src, (i8 15))>;
def : Pat<(xor VR256X:$src, (v4i64 immAllOnesV)),
def : Pat<(v4i64 (vnot VR256X:$src)),
(VPTERNLOGQZ256rri VR256X:$src, VR256X:$src, VR256X:$src, (i8 15))>;
}