mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-26 04:32:44 +01:00
Change x86 CMOVE_F to read it source, not write it.
This was breaking sqlite with the machine verifier because operand 0 was a def according to tablegen, but didn't have the 'isDef' flag set. Looking at the ISA, its clear that this operand is a source as writing to st(0) is implicit. So move the operand to the correct place in the td file. rdar://problem/20751584 llvm-svn: 236183
This commit is contained in:
parent
60595b4739
commit
00f179e7a1
@ -350,21 +350,21 @@ defm CMOVNP : FPCMov<X86_COND_NP>;
|
||||
|
||||
let Predicates = [HasCMov] in {
|
||||
// These are not factored because there's no clean way to pass DA/DB.
|
||||
def CMOVB_F : FPI<0xDA, MRM0r, (outs RST:$op), (ins),
|
||||
def CMOVB_F : FPI<0xDA, MRM0r, (outs), (ins RST:$op),
|
||||
"fcmovb\t{$op, %st(0)|st(0), $op}">;
|
||||
def CMOVBE_F : FPI<0xDA, MRM2r, (outs RST:$op), (ins),
|
||||
def CMOVBE_F : FPI<0xDA, MRM2r, (outs), (ins RST:$op),
|
||||
"fcmovbe\t{$op, %st(0)|st(0), $op}">;
|
||||
def CMOVE_F : FPI<0xDA, MRM1r, (outs RST:$op), (ins),
|
||||
def CMOVE_F : FPI<0xDA, MRM1r, (outs), (ins RST:$op),
|
||||
"fcmove\t{$op, %st(0)|st(0), $op}">;
|
||||
def CMOVP_F : FPI<0xDA, MRM3r, (outs RST:$op), (ins),
|
||||
def CMOVP_F : FPI<0xDA, MRM3r, (outs), (ins RST:$op),
|
||||
"fcmovu\t{$op, %st(0)|st(0), $op}">;
|
||||
def CMOVNB_F : FPI<0xDB, MRM0r, (outs RST:$op), (ins),
|
||||
def CMOVNB_F : FPI<0xDB, MRM0r, (outs), (ins RST:$op),
|
||||
"fcmovnb\t{$op, %st(0)|st(0), $op}">;
|
||||
def CMOVNBE_F: FPI<0xDB, MRM2r, (outs RST:$op), (ins),
|
||||
def CMOVNBE_F: FPI<0xDB, MRM2r, (outs), (ins RST:$op),
|
||||
"fcmovnbe\t{$op, %st(0)|st(0), $op}">;
|
||||
def CMOVNE_F : FPI<0xDB, MRM1r, (outs RST:$op), (ins),
|
||||
def CMOVNE_F : FPI<0xDB, MRM1r, (outs), (ins RST:$op),
|
||||
"fcmovne\t{$op, %st(0)|st(0), $op}">;
|
||||
def CMOVNP_F : FPI<0xDB, MRM3r, (outs RST:$op), (ins),
|
||||
def CMOVNP_F : FPI<0xDB, MRM3r, (outs), (ins RST:$op),
|
||||
"fcmovnu\t{$op, %st(0)|st(0), $op}">;
|
||||
} // Predicates = [HasCMov]
|
||||
|
||||
|
15
test/CodeGen/X86/fcmove.ll
Normal file
15
test/CodeGen/X86/fcmove.ll
Normal file
@ -0,0 +1,15 @@
|
||||
; RUN: llc %s -o - -verify-machineinstrs | FileCheck %s
|
||||
|
||||
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64-unknown-unknown"
|
||||
|
||||
; Test that we can generate an fcmove, and also that it passes verification.
|
||||
|
||||
; CHECK-LABEL: cmove_f
|
||||
; CHECK: fcmove %st({{[0-7]}}), %st(0)
|
||||
define x86_fp80 @cmove_f(x86_fp80 %a, x86_fp80 %b, i32 %c) {
|
||||
%test = icmp eq i32 %c, 0
|
||||
%add = fadd x86_fp80 %a, %b
|
||||
%ret = select i1 %test, x86_fp80 %add, x86_fp80 %b
|
||||
ret x86_fp80 %ret
|
||||
}
|
Loading…
Reference in New Issue
Block a user