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Don't use implicit register operands to calculate L-bit for AVX instructions. Needed because super reg defs and kills are added as implicit operands on 128-bit instructions. Fixes PR13349. Patch by Jose Fonseca.
llvm-svn: 160543
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@ -927,6 +927,8 @@ void Emitter<CodeEmitter>::emitVEXOpcodePrefix(uint64_t TSFlags,
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for (unsigned i = 0; i != MI.getNumOperands(); ++i) {
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if (!MI.getOperand(i).isReg())
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continue;
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if (MI.getOperand(i).isImplicit())
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continue;
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unsigned SrcReg = MI.getOperand(i).getReg();
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if (SrcReg >= X86::YMM0 && SrcReg <= X86::YMM15)
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VEX_L = 1;
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