RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
Code Issues Projects Releases Wiki Activity

Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.

Browse Source 
llvm-svn: 134281
This commit is contained in:
Evan Cheng 2011-07-01 22:36:09 +00:00
parent a230202d5e
commit 018b2055fc
54 changed files with 57 additions and 60 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Makefile.rules
View File

@ -1775,8 +1775,8 @@ $(ObjDir)/%GenFastISel.inc.tmp : %.td $(ObjDir)/.dir
$(Echo) "Building $(<F) \"fast\" instruction selector implementation with tblgen" $(Echo) "Building $(<F) \"fast\" instruction selector implementation with tblgen"
$(Verb) $(TableGen) -gen-fast-isel -o $(call SYSPATH, $@) $< $(Verb) $(TableGen) -gen-fast-isel -o $(call SYSPATH, $@) $<
$(TARGET:%=$(ObjDir)/%GenSubtarget.inc.tmp): \ $(TARGET:%=$(ObjDir)/%GenSubtargetInfo.inc.tmp): \
$(ObjDir)/%GenSubtarget.inc.tmp : %.td $(ObjDir)/.dir $(ObjDir)/%GenSubtargetInfo.inc.tmp : %.td $(ObjDir)/.dir
$(Echo) "Building $(<F) subtarget information with tblgen" $(Echo) "Building $(<F) subtarget information with tblgen"
$(Verb) $(TableGen) -gen-subtarget -o $(call SYSPATH, $@) $< $(Verb) $(TableGen) -gen-subtarget -o $(call SYSPATH, $@) $<

2
lib/Target/ARM/ARMSubtarget.cpp
View File

@ -21,7 +21,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "ARMGenSubtarget.inc" #include "ARMGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/ARM/ARMSubtarget.h
View File

@ -20,7 +20,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "ARMGenSubtarget.inc" #include "ARMGenSubtargetInfo.inc"
namespace llvm { namespace llvm {
class GlobalValue; class GlobalValue;

2
lib/Target/ARM/CMakeLists.txt
View File

@ -9,7 +9,7 @@ tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher)
tablegen(ARMGenDAGISel.inc -gen-dag-isel) tablegen(ARMGenDAGISel.inc -gen-dag-isel)
tablegen(ARMGenFastISel.inc -gen-fast-isel) tablegen(ARMGenFastISel.inc -gen-fast-isel)
tablegen(ARMGenCallingConv.inc -gen-callingconv) tablegen(ARMGenCallingConv.inc -gen-callingconv)
tablegen(ARMGenSubtarget.inc -gen-subtarget) tablegen(ARMGenSubtargetInfo.inc -gen-subtarget)
tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
tablegen(ARMGenDecoderTables.inc -gen-arm-decoder) tablegen(ARMGenDecoderTables.inc -gen-arm-decoder)

2
lib/Target/ARM/Makefile
View File

@ -14,7 +14,7 @@ TARGET = ARM
# Make sure that tblgen is run, first thing. # Make sure that tblgen is run, first thing.
BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \ BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \
ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \ ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \
ARMGenDAGISel.inc ARMGenSubtarget.inc \ ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \
ARMGenCodeEmitter.inc ARMGenCallingConv.inc \ ARMGenCodeEmitter.inc ARMGenCallingConv.inc \
ARMGenDecoderTables.inc ARMGenEDInfo.inc \ ARMGenDecoderTables.inc ARMGenEDInfo.inc \
ARMGenFastISel.inc ARMGenMCCodeEmitter.inc ARMGenFastISel.inc ARMGenMCCodeEmitter.inc

3
lib/Target/Alpha/AlphaSubtarget.cpp
View File

@ -13,12 +13,11 @@
#include "AlphaSubtarget.h" #include "AlphaSubtarget.h"
#include "Alpha.h" #include "Alpha.h"
#include "AlphaGenSubtarget.inc"
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "AlphaGenSubtarget.inc" #include "AlphaGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/Alpha/AlphaSubtarget.h
View File

@ -19,7 +19,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "AlphaGenSubtarget.inc" #include "AlphaGenSubtargetInfo.inc"
namespace llvm { namespace llvm {

2
lib/Target/Alpha/CMakeLists.txt
View File

@ -5,7 +5,7 @@ tablegen(AlphaGenInstrInfo.inc -gen-instr-info)
tablegen(AlphaGenAsmWriter.inc -gen-asm-writer) tablegen(AlphaGenAsmWriter.inc -gen-asm-writer)
tablegen(AlphaGenDAGISel.inc -gen-dag-isel) tablegen(AlphaGenDAGISel.inc -gen-dag-isel)
tablegen(AlphaGenCallingConv.inc -gen-callingconv) tablegen(AlphaGenCallingConv.inc -gen-callingconv)
tablegen(AlphaGenSubtarget.inc -gen-subtarget) tablegen(AlphaGenSubtargetInfo.inc -gen-subtarget)
add_llvm_target(AlphaCodeGen add_llvm_target(AlphaCodeGen
AlphaAsmPrinter.cpp AlphaAsmPrinter.cpp

2
lib/Target/Alpha/Makefile
View File

@ -14,7 +14,7 @@ TARGET = Alpha
# Make sure that tblgen is run, first thing. # Make sure that tblgen is run, first thing.
BUILT_SOURCES = AlphaGenRegisterInfo.inc AlphaGenInstrInfo.inc \ BUILT_SOURCES = AlphaGenRegisterInfo.inc AlphaGenInstrInfo.inc \
AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \ AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \
AlphaGenCallingConv.inc AlphaGenSubtarget.inc AlphaGenCallingConv.inc AlphaGenSubtargetInfo.inc
DIRS = TargetInfo DIRS = TargetInfo

2
lib/Target/Blackfin/BlackfinSubtarget.cpp
View File

@ -16,7 +16,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "BlackfinGenSubtarget.inc" #include "BlackfinGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/Blackfin/BlackfinSubtarget.h
View File

@ -18,7 +18,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "BlackfinGenSubtarget.inc" #include "BlackfinGenSubtargetInfo.inc"
namespace llvm { namespace llvm {

2
lib/Target/Blackfin/CMakeLists.txt
View File

@ -4,7 +4,7 @@ tablegen(BlackfinGenRegisterInfo.inc -gen-register-info)
tablegen(BlackfinGenInstrInfo.inc -gen-instr-info) tablegen(BlackfinGenInstrInfo.inc -gen-instr-info)
tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer) tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer)
tablegen(BlackfinGenDAGISel.inc -gen-dag-isel) tablegen(BlackfinGenDAGISel.inc -gen-dag-isel)
tablegen(BlackfinGenSubtarget.inc -gen-subtarget) tablegen(BlackfinGenSubtargetInfo.inc -gen-subtarget)
tablegen(BlackfinGenCallingConv.inc -gen-callingconv) tablegen(BlackfinGenCallingConv.inc -gen-callingconv)
tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic) tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic)

2
lib/Target/Blackfin/Makefile
View File

@ -14,7 +14,7 @@ TARGET = Blackfin
# Make sure that tblgen is run, first thing. # Make sure that tblgen is run, first thing.
BUILT_SOURCES = BlackfinGenRegisterInfo.inc BlackfinGenInstrInfo.inc \ BUILT_SOURCES = BlackfinGenRegisterInfo.inc BlackfinGenInstrInfo.inc \
BlackfinGenAsmWriter.inc \ BlackfinGenAsmWriter.inc \
BlackfinGenDAGISel.inc BlackfinGenSubtarget.inc \ BlackfinGenDAGISel.inc BlackfinGenSubtargetInfo.inc \
BlackfinGenCallingConv.inc BlackfinGenIntrinsics.inc BlackfinGenCallingConv.inc BlackfinGenIntrinsics.inc
DIRS = TargetInfo DIRS = TargetInfo

2
lib/Target/CellSPU/CMakeLists.txt
View File

@ -5,7 +5,7 @@ tablegen(SPUGenCodeEmitter.inc -gen-emitter)
tablegen(SPUGenRegisterInfo.inc -gen-register-info) tablegen(SPUGenRegisterInfo.inc -gen-register-info)
tablegen(SPUGenInstrInfo.inc -gen-instr-info) tablegen(SPUGenInstrInfo.inc -gen-instr-info)
tablegen(SPUGenDAGISel.inc -gen-dag-isel) tablegen(SPUGenDAGISel.inc -gen-dag-isel)
tablegen(SPUGenSubtarget.inc -gen-subtarget) tablegen(SPUGenSubtargetInfo.inc -gen-subtarget)
tablegen(SPUGenCallingConv.inc -gen-callingconv) tablegen(SPUGenCallingConv.inc -gen-callingconv)
add_llvm_target(CellSPUCodeGen add_llvm_target(CellSPUCodeGen

2
lib/Target/CellSPU/Makefile
View File

@ -13,7 +13,7 @@ TARGET = SPU
BUILT_SOURCES = SPUGenInstrInfo.inc SPUGenRegisterInfo.inc \ BUILT_SOURCES = SPUGenInstrInfo.inc SPUGenRegisterInfo.inc \
SPUGenAsmWriter.inc SPUGenCodeEmitter.inc \ SPUGenAsmWriter.inc SPUGenCodeEmitter.inc \
SPUGenDAGISel.inc \ SPUGenDAGISel.inc \
SPUGenSubtarget.inc SPUGenCallingConv.inc SPUGenSubtargetInfo.inc SPUGenCallingConv.inc
DIRS = TargetInfo DIRS = TargetInfo

2
lib/Target/CellSPU/SPUSubtarget.cpp
View File

@ -19,7 +19,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "SPUGenSubtarget.inc" #include "SPUGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/CellSPU/SPUSubtarget.h
View File

@ -19,7 +19,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "SPUGenSubtarget.inc" #include "SPUGenSubtargetInfo.inc"
namespace llvm { namespace llvm {
class GlobalValue; class GlobalValue;

2
lib/Target/MBlaze/CMakeLists.txt
View File

@ -7,7 +7,7 @@ tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher) tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher)
tablegen(MBlazeGenDAGISel.inc -gen-dag-isel) tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
tablegen(MBlazeGenCallingConv.inc -gen-callingconv) tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
tablegen(MBlazeGenSubtarget.inc -gen-subtarget) tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget)
tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic) tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info) tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)

2
lib/Target/MBlaze/MBlazeSubtarget.cpp
View File

@ -19,7 +19,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "MBlazeGenSubtarget.inc" #include "MBlazeGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/MBlaze/MBlazeSubtarget.h
View File

@ -19,7 +19,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "MBlazeGenSubtarget.inc" #include "MBlazeGenSubtargetInfo.inc"
namespace llvm { namespace llvm {

2
lib/Target/MBlaze/Makefile
View File

@ -15,7 +15,7 @@ BUILT_SOURCES = MBlazeGenRegisterInfo.inc MBlazeGenInstrInfo.inc \
MBlazeGenAsmWriter.inc \ MBlazeGenAsmWriter.inc \
MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \ MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \
MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \ MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc \ MBlazeGenSubtargetInfo.inc MBlazeGenIntrinsics.inc \
MBlazeGenEDInfo.inc MBlazeGenEDInfo.inc
DIRS = InstPrinter AsmParser Disassembler TargetInfo DIRS = InstPrinter AsmParser Disassembler TargetInfo

2
lib/Target/MSP430/CMakeLists.txt
View File

@ -5,7 +5,7 @@ tablegen(MSP430GenInstrInfo.inc -gen-instr-info)
tablegen(MSP430GenAsmWriter.inc -gen-asm-writer) tablegen(MSP430GenAsmWriter.inc -gen-asm-writer)
tablegen(MSP430GenDAGISel.inc -gen-dag-isel) tablegen(MSP430GenDAGISel.inc -gen-dag-isel)
tablegen(MSP430GenCallingConv.inc -gen-callingconv) tablegen(MSP430GenCallingConv.inc -gen-callingconv)
tablegen(MSP430GenSubtarget.inc -gen-subtarget) tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget)
add_llvm_target(MSP430CodeGen add_llvm_target(MSP430CodeGen
MSP430BranchSelector.cpp MSP430BranchSelector.cpp

2
lib/Target/MSP430/MSP430Subtarget.cpp
View File

@ -17,7 +17,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "MSP430GenSubtarget.inc" #include "MSP430GenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/MSP430/MSP430Subtarget.h
View File

@ -17,7 +17,7 @@
#include "llvm/Target/TargetSubtargetInfo.h" #include "llvm/Target/TargetSubtargetInfo.h"
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "MSP430GenSubtarget.inc" #include "MSP430GenSubtargetInfo.inc"
#include <string> #include <string>

2
lib/Target/MSP430/Makefile
View File

@ -15,7 +15,7 @@ TARGET = MSP430
BUILT_SOURCES = MSP430GenRegisterInfo.inc MSP430GenInstrInfo.inc \ BUILT_SOURCES = MSP430GenRegisterInfo.inc MSP430GenInstrInfo.inc \
MSP430GenAsmWriter.inc \ MSP430GenAsmWriter.inc \
MSP430GenDAGISel.inc MSP430GenCallingConv.inc \ MSP430GenDAGISel.inc MSP430GenCallingConv.inc \
MSP430GenSubtarget.inc MSP430GenSubtargetInfo.inc
DIRS = InstPrinter TargetInfo DIRS = InstPrinter TargetInfo

2
lib/Target/Mips/CMakeLists.txt
View File

@ -5,7 +5,7 @@ tablegen(MipsGenInstrInfo.inc -gen-instr-info)
tablegen(MipsGenAsmWriter.inc -gen-asm-writer) tablegen(MipsGenAsmWriter.inc -gen-asm-writer)
tablegen(MipsGenDAGISel.inc -gen-dag-isel) tablegen(MipsGenDAGISel.inc -gen-dag-isel)
tablegen(MipsGenCallingConv.inc -gen-callingconv) tablegen(MipsGenCallingConv.inc -gen-callingconv)
tablegen(MipsGenSubtarget.inc -gen-subtarget) tablegen(MipsGenSubtargetInfo.inc -gen-subtarget)
add_llvm_target(MipsCodeGen add_llvm_target(MipsCodeGen
MipsAsmPrinter.cpp MipsAsmPrinter.cpp

2
lib/Target/Mips/Makefile
View File

@ -15,7 +15,7 @@ TARGET = Mips
BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \ BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \
MipsGenAsmWriter.inc \ MipsGenAsmWriter.inc \
MipsGenDAGISel.inc MipsGenCallingConv.inc \ MipsGenDAGISel.inc MipsGenCallingConv.inc \
MipsGenSubtarget.inc MipsGenSubtargetInfo.inc
DIRS = TargetInfo DIRS = TargetInfo

2
lib/Target/Mips/MipsSubtarget.cpp
View File

@ -17,7 +17,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "MipsGenSubtarget.inc" #include "MipsGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/Mips/MipsSubtarget.h
View File

@ -19,7 +19,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "MipsGenSubtarget.inc" #include "MipsGenSubtargetInfo.inc"
namespace llvm { namespace llvm {

2
lib/Target/PTX/CMakeLists.txt
View File

@ -5,7 +5,7 @@ tablegen(PTXGenCallingConv.inc -gen-callingconv)
tablegen(PTXGenDAGISel.inc -gen-dag-isel) tablegen(PTXGenDAGISel.inc -gen-dag-isel)
tablegen(PTXGenInstrInfo.inc -gen-instr-info) tablegen(PTXGenInstrInfo.inc -gen-instr-info)
tablegen(PTXGenRegisterInfo.inc -gen-register-info) tablegen(PTXGenRegisterInfo.inc -gen-register-info)
tablegen(PTXGenSubtarget.inc -gen-subtarget) tablegen(PTXGenSubtargetInfo.inc -gen-subtarget)
add_llvm_target(PTXCodeGen add_llvm_target(PTXCodeGen
PTXAsmPrinter.cpp PTXAsmPrinter.cpp

2
lib/Target/PTX/Makefile
View File

@ -17,7 +17,7 @@ BUILT_SOURCES = PTXGenAsmWriter.inc \
PTXGenDAGISel.inc \ PTXGenDAGISel.inc \
PTXGenInstrInfo.inc \ PTXGenInstrInfo.inc \
PTXGenRegisterInfo.inc \ PTXGenRegisterInfo.inc \
PTXGenSubtarget.inc PTXGenSubtargetInfo.inc
DIRS = TargetInfo DIRS = TargetInfo

4
lib/Target/PTX/PTXSubtarget.cpp
View File

@ -17,7 +17,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "PTXGenSubtarget.inc" #include "PTXGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;
@ -63,5 +63,3 @@ std::string PTXSubtarget::getPTXVersionString() const {
case PTX_VERSION_2_3: return "2.3"; case PTX_VERSION_2_3: return "2.3";
} }
} }
#include "PTXGenSubtarget.inc"

2
lib/Target/PTX/PTXSubtarget.h
View File

@ -17,7 +17,7 @@
#include "llvm/Target/TargetSubtargetInfo.h" #include "llvm/Target/TargetSubtargetInfo.h"
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "PTXGenSubtarget.inc" #include "PTXGenSubtargetInfo.inc"
namespace llvm { namespace llvm {
class PTXSubtarget : public PTXGenSubtargetInfo { class PTXSubtarget : public PTXGenSubtargetInfo {

2
lib/Target/PowerPC/CMakeLists.txt
View File

@ -7,7 +7,7 @@ tablegen(PPCGenRegisterInfo.inc -gen-register-info)
tablegen(PPCGenInstrInfo.inc -gen-instr-info) tablegen(PPCGenInstrInfo.inc -gen-instr-info)
tablegen(PPCGenDAGISel.inc -gen-dag-isel) tablegen(PPCGenDAGISel.inc -gen-dag-isel)
tablegen(PPCGenCallingConv.inc -gen-callingconv) tablegen(PPCGenCallingConv.inc -gen-callingconv)
tablegen(PPCGenSubtarget.inc -gen-subtarget) tablegen(PPCGenSubtargetInfo.inc -gen-subtarget)
add_llvm_target(PowerPCCodeGen add_llvm_target(PowerPCCodeGen
PPCAsmBackend.cpp PPCAsmBackend.cpp

2
lib/Target/PowerPC/Makefile
View File

@ -15,7 +15,7 @@ TARGET = PPC
BUILT_SOURCES = PPCGenRegisterInfo.inc \ BUILT_SOURCES = PPCGenRegisterInfo.inc \
PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \ PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \
PPCGenInstrInfo.inc PPCGenDAGISel.inc \ PPCGenInstrInfo.inc PPCGenDAGISel.inc \
PPCGenSubtarget.inc PPCGenCallingConv.inc \ PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \
PPCGenMCCodeEmitter.inc PPCGenMCCodeEmitter.inc
DIRS = InstPrinter TargetInfo DIRS = InstPrinter TargetInfo

2
lib/Target/PowerPC/PPCSubtarget.cpp
View File

@ -20,7 +20,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "PPCGenSubtarget.inc" #include "PPCGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/PowerPC/PPCSubtarget.h
View File

@ -20,7 +20,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "PPCGenSubtarget.inc" #include "PPCGenSubtargetInfo.inc"
// GCC #defines PPC on Linux but we use it as our namespace name // GCC #defines PPC on Linux but we use it as our namespace name
#undef PPC #undef PPC

2
lib/Target/Sparc/CMakeLists.txt
View File

@ -4,7 +4,7 @@ tablegen(SparcGenRegisterInfo.inc -gen-register-info)
tablegen(SparcGenInstrInfo.inc -gen-instr-info) tablegen(SparcGenInstrInfo.inc -gen-instr-info)
tablegen(SparcGenAsmWriter.inc -gen-asm-writer) tablegen(SparcGenAsmWriter.inc -gen-asm-writer)
tablegen(SparcGenDAGISel.inc -gen-dag-isel) tablegen(SparcGenDAGISel.inc -gen-dag-isel)
tablegen(SparcGenSubtarget.inc -gen-subtarget) tablegen(SparcGenSubtargetInfo.inc -gen-subtarget)
tablegen(SparcGenCallingConv.inc -gen-callingconv) tablegen(SparcGenCallingConv.inc -gen-callingconv)
add_llvm_target(SparcCodeGen add_llvm_target(SparcCodeGen

4
lib/Target/Sparc/Makefile
View File

@ -13,8 +13,8 @@ TARGET = Sparc
# Make sure that tblgen is run, first thing. # Make sure that tblgen is run, first thing.
BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \ BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \
SparcGenAsmWriter.inc \ SparcGenAsmWriter.inc SparcGenDAGISel.inc \
SparcGenDAGISel.inc SparcGenSubtarget.inc SparcGenCallingConv.inc SparcGenSubtargetInfo.inc SparcGenCallingConv.inc
DIRS = TargetInfo DIRS = TargetInfo

2
lib/Target/Sparc/SparcSubtarget.cpp
View File

@ -16,7 +16,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "SparcGenSubtarget.inc" #include "SparcGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/Sparc/SparcSubtarget.h
View File

@ -18,7 +18,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "SparcGenSubtarget.inc" #include "SparcGenSubtargetInfo.inc"
namespace llvm { namespace llvm {

2
lib/Target/SystemZ/CMakeLists.txt
View File

@ -5,7 +5,7 @@ tablegen(SystemZGenInstrInfo.inc -gen-instr-info)
tablegen(SystemZGenAsmWriter.inc -gen-asm-writer) tablegen(SystemZGenAsmWriter.inc -gen-asm-writer)
tablegen(SystemZGenDAGISel.inc -gen-dag-isel) tablegen(SystemZGenDAGISel.inc -gen-dag-isel)
tablegen(SystemZGenCallingConv.inc -gen-callingconv) tablegen(SystemZGenCallingConv.inc -gen-callingconv)
tablegen(SystemZGenSubtarget.inc -gen-subtarget) tablegen(SystemZGenSubtargetInfo.inc -gen-subtarget)
add_llvm_target(SystemZCodeGen add_llvm_target(SystemZCodeGen
SystemZAsmPrinter.cpp SystemZAsmPrinter.cpp

4
lib/Target/SystemZ/Makefile
View File

@ -13,8 +13,8 @@ TARGET = SystemZ
# Make sure that tblgen is run, first thing. # Make sure that tblgen is run, first thing.
BUILT_SOURCES = SystemZGenRegisterInfo.inc SystemZGenInstrInfo.inc \ BUILT_SOURCES = SystemZGenRegisterInfo.inc SystemZGenInstrInfo.inc \
SystemZGenAsmWriter.inc \ SystemZGenAsmWriter.inc SystemZGenDAGISel.inc \
SystemZGenDAGISel.inc SystemZGenSubtarget.inc SystemZGenCallingConv.inc SystemZGenSubtargetInfo.inc SystemZGenCallingConv.inc
DIRS = TargetInfo DIRS = TargetInfo

2
lib/Target/SystemZ/SystemZSubtarget.cpp
View File

@ -19,7 +19,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "SystemZGenSubtarget.inc" #include "SystemZGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/SystemZ/SystemZSubtarget.h
View File

@ -18,7 +18,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "SystemZGenSubtarget.inc" #include "SystemZGenSubtargetInfo.inc"
namespace llvm { namespace llvm {
class GlobalValue; class GlobalValue;

2
lib/Target/X86/CMakeLists.txt
View File

@ -9,7 +9,7 @@ tablegen(X86GenAsmMatcher.inc -gen-asm-matcher)
tablegen(X86GenDAGISel.inc -gen-dag-isel) tablegen(X86GenDAGISel.inc -gen-dag-isel)
tablegen(X86GenFastISel.inc -gen-fast-isel) tablegen(X86GenFastISel.inc -gen-fast-isel)
tablegen(X86GenCallingConv.inc -gen-callingconv) tablegen(X86GenCallingConv.inc -gen-callingconv)
tablegen(X86GenSubtarget.inc -gen-subtarget) tablegen(X86GenSubtargetInfo.inc -gen-subtarget)
tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info) tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info)
set(sources set(sources

2
lib/Target/X86/MCTargetDesc/X86TargetDesc.cpp
View File

@ -24,7 +24,7 @@
#include "X86GenInstrInfo.inc" #include "X86GenInstrInfo.inc"
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#include "X86GenSubtarget.inc" #include "X86GenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/X86/Makefile
View File

@ -16,7 +16,7 @@ BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \
X86GenAsmWriter.inc X86GenAsmMatcher.inc \ X86GenAsmWriter.inc X86GenAsmMatcher.inc \
X86GenAsmWriter1.inc X86GenDAGISel.inc \ X86GenAsmWriter1.inc X86GenDAGISel.inc \
X86GenDisassemblerTables.inc X86GenFastISel.inc \ X86GenDisassemblerTables.inc X86GenFastISel.inc \
X86GenCallingConv.inc X86GenSubtarget.inc \ X86GenCallingConv.inc X86GenSubtargetInfo.inc \
X86GenEDInfo.inc X86GenEDInfo.inc
DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils

2
lib/Target/X86/X86Subtarget.cpp
View File

@ -24,7 +24,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "X86GenSubtarget.inc" #include "X86GenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/X86/X86Subtarget.h
View File

@ -20,7 +20,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "X86GenSubtarget.inc" #include "X86GenSubtargetInfo.inc"
namespace llvm { namespace llvm {
class GlobalValue; class GlobalValue;

2
lib/Target/XCore/CMakeLists.txt
View File

@ -5,7 +5,7 @@ tablegen(XCoreGenInstrInfo.inc -gen-instr-info)
tablegen(XCoreGenAsmWriter.inc -gen-asm-writer) tablegen(XCoreGenAsmWriter.inc -gen-asm-writer)
tablegen(XCoreGenDAGISel.inc -gen-dag-isel) tablegen(XCoreGenDAGISel.inc -gen-dag-isel)
tablegen(XCoreGenCallingConv.inc -gen-callingconv) tablegen(XCoreGenCallingConv.inc -gen-callingconv)
tablegen(XCoreGenSubtarget.inc -gen-subtarget) tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget)
add_llvm_target(XCoreCodeGen add_llvm_target(XCoreCodeGen
XCoreAsmPrinter.cpp XCoreAsmPrinter.cpp

2
lib/Target/XCore/Makefile
View File

@ -15,7 +15,7 @@ TARGET = XCore
BUILT_SOURCES = XCoreGenRegisterInfo.inc XCoreGenInstrInfo.inc \ BUILT_SOURCES = XCoreGenRegisterInfo.inc XCoreGenInstrInfo.inc \
XCoreGenAsmWriter.inc \ XCoreGenAsmWriter.inc \
XCoreGenDAGISel.inc XCoreGenCallingConv.inc \ XCoreGenDAGISel.inc XCoreGenCallingConv.inc \
XCoreGenSubtarget.inc XCoreGenSubtargetInfo.inc
DIRS = TargetInfo DIRS = TargetInfo

2
lib/Target/XCore/XCoreSubtarget.cpp
View File

@ -17,7 +17,7 @@
#define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_CTOR
#define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_MC_DESC
#define GET_SUBTARGETINFO_TARGET_DESC #define GET_SUBTARGETINFO_TARGET_DESC
#include "XCoreGenSubtarget.inc" #include "XCoreGenSubtargetInfo.inc"
using namespace llvm; using namespace llvm;

2
lib/Target/XCore/XCoreSubtarget.h
View File

@ -19,7 +19,7 @@
#include <string> #include <string>
#define GET_SUBTARGETINFO_HEADER #define GET_SUBTARGETINFO_HEADER
#include "XCoreGenSubtarget.inc" #include "XCoreGenSubtargetInfo.inc"
namespace llvm { namespace llvm {