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https://github.com/RPCS3/llvm-mirror.git
synced 2025-02-01 05:01:59 +01:00
[MIPS GlobalISel] Lower aggregate structure return arguments
Implement aggregate structure split to simpler types in splitToValueTypes. splitToValueTypes is used for return values. According to MipsABIInfo from clang/lib/CodeGen/TargetInfo.cpp, aggregate structure arguments for O32 always get simplified and thus will remain unsupported by the MIPS GlobalISel for the time being. For O32, aggregate structures can be encountered only for complex number returns e.g. 'complex float' or 'complex double' from <complex.h>. Differential Revision: https://reviews.llvm.org/D67963 llvm-svn: 372957
This commit is contained in:
Petar Avramovic
parent
c9df6ae840
commit
023074f856
@ -358,7 +358,7 @@ bool OutgoingValueHandler::handleSplit(SmallVectorImpl<Register> &VRegs,
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return true;
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}
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static bool isSupportedType(Type *T) {
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static bool isSupportedArgumentType(Type *T) {
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if (T->isIntegerTy())
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return true;
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if (T->isPointerTy())
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@ -368,6 +368,18 @@ static bool isSupportedType(Type *T) {
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return false;
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}
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static bool isSupportedReturnType(Type *T) {
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if (T->isIntegerTy())
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return true;
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if (T->isPointerTy())
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return true;
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if (T->isFloatingPointTy())
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return true;
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if (T->isAggregateType())
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return true;
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return false;
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}
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static CCValAssign::LocInfo determineLocInfo(const MVT RegisterVT, const EVT VT,
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const ISD::ArgFlagsTy &Flags) {
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// > does not mean loss of information as type RegisterVT can't hold type VT,
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@ -404,7 +416,7 @@ bool MipsCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
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MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(Mips::RetRA);
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if (Val != nullptr && !isSupportedType(Val->getType()))
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if (Val != nullptr && !isSupportedReturnType(Val->getType()))
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return false;
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if (!VRegs.empty()) {
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@ -412,21 +424,13 @@ bool MipsCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
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const Function &F = MF.getFunction();
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const DataLayout &DL = MF.getDataLayout();
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const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
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LLVMContext &Ctx = Val->getType()->getContext();
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SmallVector<EVT, 4> SplitEVTs;
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ComputeValueVTs(TLI, DL, Val->getType(), SplitEVTs);
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assert(VRegs.size() == SplitEVTs.size() &&
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"For each split Type there should be exactly one VReg.");
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SmallVector<ArgInfo, 8> RetInfos;
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SmallVector<unsigned, 8> OrigArgIndices;
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for (unsigned i = 0; i < SplitEVTs.size(); ++i) {
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ArgInfo CurArgInfo = ArgInfo{VRegs[i], SplitEVTs[i].getTypeForEVT(Ctx)};
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setArgFlags(CurArgInfo, AttributeList::ReturnIndex, DL, F);
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splitToValueTypes(CurArgInfo, 0, RetInfos, OrigArgIndices);
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}
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ArgInfo ArgRetInfo(VRegs, Val->getType());
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setArgFlags(ArgRetInfo, AttributeList::ReturnIndex, DL, F);
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splitToValueTypes(DL, ArgRetInfo, 0, RetInfos, OrigArgIndices);
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SmallVector<ISD::OutputArg, 8> Outs;
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subTargetRegTypeForCallingConv(F, RetInfos, OrigArgIndices, Outs);
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@ -455,7 +459,7 @@ bool MipsCallLowering::lowerFormalArguments(
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return true;
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for (auto &Arg : F.args()) {
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if (!isSupportedType(Arg.getType()))
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if (!isSupportedArgumentType(Arg.getType()))
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return false;
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}
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@ -469,7 +473,8 @@ bool MipsCallLowering::lowerFormalArguments(
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for (auto &Arg : F.args()) {
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ArgInfo AInfo(VRegs[i], Arg.getType());
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setArgFlags(AInfo, i + AttributeList::FirstArgIndex, DL, F);
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splitToValueTypes(AInfo, i, ArgInfos, OrigArgIndices);
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ArgInfos.push_back(AInfo);
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OrigArgIndices.push_back(i);
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++i;
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}
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@ -536,7 +541,7 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
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return false;
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for (auto &Arg : Info.OrigArgs) {
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if (!isSupportedType(Arg.Ty))
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if (!isSupportedArgumentType(Arg.Ty))
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return false;
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if (Arg.Flags[0].isByVal())
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return false;
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@ -544,11 +549,12 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
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return false;
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}
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if (!Info.OrigRet.Ty->isVoidTy() && !isSupportedType(Info.OrigRet.Ty))
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if (!Info.OrigRet.Ty->isVoidTy() && !isSupportedReturnType(Info.OrigRet.Ty))
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return false;
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MachineFunction &MF = MIRBuilder.getMF();
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const Function &F = MF.getFunction();
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const DataLayout &DL = MF.getDataLayout();
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const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
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const MipsTargetMachine &TM =
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static_cast<const MipsTargetMachine &>(MF.getTarget());
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@ -588,7 +594,8 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
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Entry.Ty = Arg.Ty;
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FuncOrigArgs.push_back(Entry);
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splitToValueTypes(Arg, i, ArgInfos, OrigArgIndices);
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ArgInfos.push_back(Arg);
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OrigArgIndices.push_back(i);
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++i;
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}
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@ -639,7 +646,7 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
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ArgInfos.clear();
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SmallVector<unsigned, 8> OrigRetIndices;
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splitToValueTypes(Info.OrigRet, 0, ArgInfos, OrigRetIndices);
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splitToValueTypes(DL, Info.OrigRet, 0, ArgInfos, OrigRetIndices);
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SmallVector<ISD::InputArg, 8> Ins;
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subTargetRegTypeForCallingConv(F, ArgInfos, OrigRetIndices, Ins);
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@ -693,12 +700,21 @@ void MipsCallLowering::subTargetRegTypeForCallingConv(
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}
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void MipsCallLowering::splitToValueTypes(
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const ArgInfo &OrigArg, unsigned OriginalIndex,
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const DataLayout &DL, const ArgInfo &OrigArg, unsigned OriginalIndex,
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SmallVectorImpl<ArgInfo> &SplitArgs,
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SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const {
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// TODO : perform structure and array split. For now we only deal with
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// types that pass isSupportedType check.
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SplitArgs.push_back(OrigArg);
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SmallVector<EVT, 4> SplitEVTs;
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SmallVector<Register, 4> SplitVRegs;
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const MipsTargetLowering &TLI = *getTLI<MipsTargetLowering>();
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LLVMContext &Ctx = OrigArg.Ty->getContext();
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ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitEVTs);
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for (unsigned i = 0; i < SplitEVTs.size(); ++i) {
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ArgInfo Info = ArgInfo{OrigArg.Regs[i], SplitEVTs[i].getTypeForEVT(Ctx)};
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Info.Flags = OrigArg.Flags;
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SplitArgs.push_back(Info);
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SplitArgsOrigIndices.push_back(OriginalIndex);
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}
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}
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@ -82,7 +82,8 @@ private:
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/// Split structures and arrays, save original argument indices since
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/// Mips calling convention needs info about original argument type.
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void splitToValueTypes(const ArgInfo &OrigArg, unsigned OriginalIndex,
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void splitToValueTypes(const DataLayout &DL, const ArgInfo &OrigArg,
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unsigned OriginalIndex,
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SmallVectorImpl<ArgInfo> &SplitArgs,
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SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const;
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};
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@ -0,0 +1,132 @@
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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define { float, float } @add_complex_float({ float, float }* %a, { float, float }* %b) {
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; MIPS32-LABEL: name: add_complex_float
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
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; MIPS32: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF
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; MIPS32: [[COPY2:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
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; MIPS32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[COPY2]](p0) :: (load 4 from %ir..realp)
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
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; MIPS32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s32)
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; MIPS32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p0) :: (load 4 from %ir..imagp)
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; MIPS32: [[COPY3:%[0-9]+]]:_(p0) = COPY [[COPY1]](p0)
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; MIPS32: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[COPY3]](p0) :: (load 4 from %ir..realp1)
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; MIPS32: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[COPY1]], [[C]](s32)
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; MIPS32: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p0) :: (load 4 from %ir..imagp3)
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; MIPS32: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[LOAD]], [[LOAD2]]
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; MIPS32: [[FADD1:%[0-9]+]]:_(s32) = G_FADD [[LOAD1]], [[LOAD3]]
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; MIPS32: $f0 = COPY [[FADD]](s32)
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; MIPS32: $f2 = COPY [[FADD1]](s32)
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; MIPS32: RetRA implicit $f0, implicit $f2
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entry:
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%.realp = getelementptr inbounds { float, float }, { float, float }* %a, i32 0, i32 0
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%.real = load float, float* %.realp, align 4
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%.imagp = getelementptr inbounds { float, float }, { float, float }* %a, i32 0, i32 1
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%.imag = load float, float* %.imagp, align 4
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%.realp1 = getelementptr inbounds { float, float }, { float, float }* %b, i32 0, i32 0
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%.real2 = load float, float* %.realp1, align 4
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%.imagp3 = getelementptr inbounds { float, float }, { float, float }* %b, i32 0, i32 1
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%.imag4 = load float, float* %.imagp3, align 4
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%add.r = fadd float %.real, %.real2
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%add.i = fadd float %.imag, %.imag4
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%.fca.0.insert = insertvalue { float, float } undef, float %add.r, 0
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%.fca.1.insert = insertvalue { float, float } %.fca.0.insert, float %add.i, 1
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ret { float, float } %.fca.1.insert
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}
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define { double, double } @add_complex_double({ double, double }* %a, { double, double }* %b) {
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; MIPS32-LABEL: name: add_complex_double
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
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; MIPS32: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
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; MIPS32: [[COPY2:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
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; MIPS32: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY2]](p0) :: (load 8 from %ir..realp)
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
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; MIPS32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s32)
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; MIPS32: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[GEP]](p0) :: (load 8 from %ir..imagp)
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; MIPS32: [[COPY3:%[0-9]+]]:_(p0) = COPY [[COPY1]](p0)
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; MIPS32: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[COPY3]](p0) :: (load 8 from %ir..realp1)
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; MIPS32: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[COPY1]], [[C]](s32)
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; MIPS32: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[GEP1]](p0) :: (load 8 from %ir..imagp3)
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; MIPS32: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[LOAD]], [[LOAD2]]
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; MIPS32: [[FADD1:%[0-9]+]]:_(s64) = G_FADD [[LOAD1]], [[LOAD3]]
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; MIPS32: $d0 = COPY [[FADD]](s64)
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; MIPS32: $d1 = COPY [[FADD1]](s64)
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; MIPS32: RetRA implicit $d0, implicit $d1
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entry:
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%.realp = getelementptr inbounds { double, double }, { double, double }* %a, i32 0, i32 0
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%.real = load double, double* %.realp, align 8
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%.imagp = getelementptr inbounds { double, double }, { double, double }* %a, i32 0, i32 1
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%.imag = load double, double* %.imagp, align 8
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%.realp1 = getelementptr inbounds { double, double }, { double, double }* %b, i32 0, i32 0
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%.real2 = load double, double* %.realp1, align 8
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%.imagp3 = getelementptr inbounds { double, double }, { double, double }* %b, i32 0, i32 1
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%.imag4 = load double, double* %.imagp3, align 8
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%add.r = fadd double %.real, %.real2
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%add.i = fadd double %.imag, %.imag4
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%.fca.0.insert = insertvalue { double, double } undef, double %add.r, 0
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%.fca.1.insert = insertvalue { double, double } %.fca.0.insert, double %add.i, 1
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ret { double, double } %.fca.1.insert
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}
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declare { float, float } @ret_complex_float()
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define void @call_ret_complex_float({ float, float }* %z) {
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; MIPS32-LABEL: name: call_ret_complex_float
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
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; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; MIPS32: JAL @ret_complex_float, csr_o32, implicit-def $ra, implicit-def $sp, implicit-def $f0, implicit-def $f2
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; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
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; MIPS32: [[COPY2:%[0-9]+]]:_(s32) = COPY $f2
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; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; MIPS32: [[COPY3:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
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; MIPS32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s32)
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; MIPS32: G_STORE [[COPY1]](s32), [[COPY3]](p0) :: (store 4 into %ir..realp)
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; MIPS32: G_STORE [[COPY2]](s32), [[GEP]](p0) :: (store 4 into %ir..imagp)
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; MIPS32: RetRA
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entry:
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%call = call { float, float } @ret_complex_float()
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%0 = extractvalue { float, float } %call, 0
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%1 = extractvalue { float, float } %call, 1
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%.realp = getelementptr inbounds { float, float }, { float, float }* %z, i32 0, i32 0
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%.imagp = getelementptr inbounds { float, float }, { float, float }* %z, i32 0, i32 1
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store float %0, float* %.realp, align 4
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store float %1, float* %.imagp, align 4
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ret void
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}
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declare { double, double } @ret_complex_double()
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define void @call_ret_complex_double({ double, double }* %z) {
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; MIPS32-LABEL: name: call_ret_complex_double
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; MIPS32: bb.1.entry:
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
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; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
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; MIPS32: JAL @ret_complex_double, csr_o32, implicit-def $ra, implicit-def $sp, implicit-def $d0, implicit-def $d1
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; MIPS32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0
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; MIPS32: [[COPY2:%[0-9]+]]:_(s64) = COPY $d1
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; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
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; MIPS32: [[COPY3:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
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; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
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; MIPS32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[COPY]], [[C]](s32)
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; MIPS32: G_STORE [[COPY1]](s64), [[COPY3]](p0) :: (store 8 into %ir..realp)
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; MIPS32: G_STORE [[COPY2]](s64), [[GEP]](p0) :: (store 8 into %ir..imagp)
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; MIPS32: RetRA
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entry:
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%call = call { double, double } @ret_complex_double()
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%0 = extractvalue { double, double } %call, 0
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%1 = extractvalue { double, double } %call, 1
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%.realp = getelementptr inbounds { double, double }, { double, double }* %z, i32 0, i32 0
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%.imagp = getelementptr inbounds { double, double }, { double, double }* %z, i32 0, i32 1
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store double %0, double* %.realp, align 8
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store double %1, double* %.imagp, align 8
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ret void
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}
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114
test/CodeGen/Mips/GlobalISel/llvm-ir/aggregate_struct_return.ll
Normal file
114
test/CodeGen/Mips/GlobalISel/llvm-ir/aggregate_struct_return.ll
Normal file
@ -0,0 +1,114 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
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define { float, float } @add_complex_float({ float, float }* %a, { float, float }* %b) {
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; MIPS32-LABEL: add_complex_float:
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; MIPS32: # %bb.0: # %entry
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; MIPS32-NEXT: lwc1 $f0, 0($4)
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; MIPS32-NEXT: lwc1 $f1, 4($4)
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; MIPS32-NEXT: lwc1 $f2, 0($5)
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; MIPS32-NEXT: lwc1 $f3, 4($5)
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; MIPS32-NEXT: add.s $f0, $f0, $f2
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; MIPS32-NEXT: add.s $f2, $f1, $f3
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; MIPS32-NEXT: jr $ra
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; MIPS32-NEXT: nop
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entry:
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%.realp = getelementptr inbounds { float, float }, { float, float }* %a, i32 0, i32 0
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%.real = load float, float* %.realp, align 4
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%.imagp = getelementptr inbounds { float, float }, { float, float }* %a, i32 0, i32 1
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%.imag = load float, float* %.imagp, align 4
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%.realp1 = getelementptr inbounds { float, float }, { float, float }* %b, i32 0, i32 0
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%.real2 = load float, float* %.realp1, align 4
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||||
%.imagp3 = getelementptr inbounds { float, float }, { float, float }* %b, i32 0, i32 1
|
||||
%.imag4 = load float, float* %.imagp3, align 4
|
||||
%add.r = fadd float %.real, %.real2
|
||||
%add.i = fadd float %.imag, %.imag4
|
||||
%.fca.0.insert = insertvalue { float, float } undef, float %add.r, 0
|
||||
%.fca.1.insert = insertvalue { float, float } %.fca.0.insert, float %add.i, 1
|
||||
ret { float, float } %.fca.1.insert
|
||||
}
|
||||
|
||||
define { double, double } @add_complex_double({ double, double }* %a, { double, double }* %b) {
|
||||
; MIPS32-LABEL: add_complex_double:
|
||||
; MIPS32: # %bb.0: # %entry
|
||||
; MIPS32-NEXT: ldc1 $f0, 0($4)
|
||||
; MIPS32-NEXT: ldc1 $f2, 8($4)
|
||||
; MIPS32-NEXT: ldc1 $f4, 0($5)
|
||||
; MIPS32-NEXT: ldc1 $f6, 8($5)
|
||||
; MIPS32-NEXT: add.d $f0, $f0, $f4
|
||||
; MIPS32-NEXT: add.d $f2, $f2, $f6
|
||||
; MIPS32-NEXT: jr $ra
|
||||
; MIPS32-NEXT: nop
|
||||
entry:
|
||||
%.realp = getelementptr inbounds { double, double }, { double, double }* %a, i32 0, i32 0
|
||||
%.real = load double, double* %.realp, align 8
|
||||
%.imagp = getelementptr inbounds { double, double }, { double, double }* %a, i32 0, i32 1
|
||||
%.imag = load double, double* %.imagp, align 8
|
||||
%.realp1 = getelementptr inbounds { double, double }, { double, double }* %b, i32 0, i32 0
|
||||
%.real2 = load double, double* %.realp1, align 8
|
||||
%.imagp3 = getelementptr inbounds { double, double }, { double, double }* %b, i32 0, i32 1
|
||||
%.imag4 = load double, double* %.imagp3, align 8
|
||||
%add.r = fadd double %.real, %.real2
|
||||
%add.i = fadd double %.imag, %.imag4
|
||||
%.fca.0.insert = insertvalue { double, double } undef, double %add.r, 0
|
||||
%.fca.1.insert = insertvalue { double, double } %.fca.0.insert, double %add.i, 1
|
||||
ret { double, double } %.fca.1.insert
|
||||
}
|
||||
|
||||
declare { float, float } @ret_complex_float()
|
||||
define void @call_ret_complex_float({ float, float }* %z) {
|
||||
; MIPS32-LABEL: call_ret_complex_float:
|
||||
; MIPS32: # %bb.0: # %entry
|
||||
; MIPS32-NEXT: addiu $sp, $sp, -24
|
||||
; MIPS32-NEXT: .cfi_def_cfa_offset 24
|
||||
; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
|
||||
; MIPS32-NEXT: .cfi_offset 31, -4
|
||||
; MIPS32-NEXT: sw $4, 16($sp) # 4-byte Folded Spill
|
||||
; MIPS32-NEXT: jal ret_complex_float
|
||||
; MIPS32-NEXT: nop
|
||||
; MIPS32-NEXT: lw $1, 16($sp) # 4-byte Folded Reload
|
||||
; MIPS32-NEXT: swc1 $f0, 0($1)
|
||||
; MIPS32-NEXT: swc1 $f2, 4($1)
|
||||
; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
|
||||
; MIPS32-NEXT: addiu $sp, $sp, 24
|
||||
; MIPS32-NEXT: jr $ra
|
||||
; MIPS32-NEXT: nop
|
||||
entry:
|
||||
%call = call { float, float } @ret_complex_float()
|
||||
%0 = extractvalue { float, float } %call, 0
|
||||
%1 = extractvalue { float, float } %call, 1
|
||||
%.realp = getelementptr inbounds { float, float }, { float, float }* %z, i32 0, i32 0
|
||||
%.imagp = getelementptr inbounds { float, float }, { float, float }* %z, i32 0, i32 1
|
||||
store float %0, float* %.realp, align 4
|
||||
store float %1, float* %.imagp, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
declare { double, double } @ret_complex_double()
|
||||
define void @call_ret_complex_double({ double, double }* %z) {
|
||||
; MIPS32-LABEL: call_ret_complex_double:
|
||||
; MIPS32: # %bb.0: # %entry
|
||||
; MIPS32-NEXT: addiu $sp, $sp, -24
|
||||
; MIPS32-NEXT: .cfi_def_cfa_offset 24
|
||||
; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
|
||||
; MIPS32-NEXT: .cfi_offset 31, -4
|
||||
; MIPS32-NEXT: sw $4, 16($sp) # 4-byte Folded Spill
|
||||
; MIPS32-NEXT: jal ret_complex_double
|
||||
; MIPS32-NEXT: nop
|
||||
; MIPS32-NEXT: lw $1, 16($sp) # 4-byte Folded Reload
|
||||
; MIPS32-NEXT: sdc1 $f0, 0($1)
|
||||
; MIPS32-NEXT: sdc1 $f2, 8($1)
|
||||
; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
|
||||
; MIPS32-NEXT: addiu $sp, $sp, 24
|
||||
; MIPS32-NEXT: jr $ra
|
||||
; MIPS32-NEXT: nop
|
||||
entry:
|
||||
%call = call { double, double } @ret_complex_double()
|
||||
%0 = extractvalue { double, double } %call, 0
|
||||
%1 = extractvalue { double, double } %call, 1
|
||||
%.realp = getelementptr inbounds { double, double }, { double, double }* %z, i32 0, i32 0
|
||||
%.imagp = getelementptr inbounds { double, double }, { double, double }* %z, i32 0, i32 1
|
||||
store double %0, double* %.realp, align 8
|
||||
store double %1, double* %.imagp, align 8
|
||||
ret void
|
||||
}
|
||||
Loading…
x
Reference in New Issue
Block a user