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Change getAllocatableSet() so it returns allocatable registers for a specific register class.
llvm-svn: 36215
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@ -241,8 +241,10 @@ public:
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}
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/// getAllocatableSet - Returns a bitset indexed by register number
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/// indicating if a register is allocatable or not.
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BitVector getAllocatableSet(MachineFunction &MF) const;
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/// indicating if a register is allocatable or not. If a register class is
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/// specified, returns the subset for the class.
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BitVector getAllocatableSet(MachineFunction &MF,
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const TargetRegisterClass *RC = NULL) const;
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const TargetRegisterDesc &operator[](unsigned RegNo) const {
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assert(RegNo < NumRegs &&
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@ -34,13 +34,16 @@ MRegisterInfo::MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
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MRegisterInfo::~MRegisterInfo() {}
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BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF) const {
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BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF,
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const TargetRegisterClass *RC) const {
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BitVector Allocatable(NumRegs);
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for (MRegisterInfo::regclass_iterator I = regclass_begin(),
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E = regclass_end(); I != E; ++I) {
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const TargetRegisterClass *RC = *I;
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for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
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E = RC->allocation_order_end(MF); I != E; ++I)
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const TargetRegisterClass *TRC = *I;
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if (RC && TRC != RC)
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continue;
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for (TargetRegisterClass::iterator I = TRC->allocation_order_begin(MF),
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E = TRC->allocation_order_end(MF); I != E; ++I)
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Allocatable.set(*I);
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}
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return Allocatable;
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