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Use ARMPseudoExpand for BLr9, BLr9_pred, BXr9, and BXr9_pred.

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TableGen'erated MC lowering pseudo-expansion.

llvm-svn: 134712
This commit is contained in:
Jim Grosbach 2011-07-08 18:15:12 +00:00
parent fb52c61529
commit 0256b8b41f
2 changed files with 15 additions and 28 deletions
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18
lib/Target/ARM/ARMAsmPrinter.cpp
View File

@ -1123,24 +1123,6 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
// Darwin call instructions are just normal call instructions with different
// clobber semantics (they clobber R9).
case ARM::BLr9:
case ARM::BLr9_pred:
case ARM::BLXr9:
case ARM::BLXr9_pred: {
unsigned newOpc;
switch (Opc) {
default: assert(0);
case ARM::BLr9: newOpc = ARM::BL; break;
case ARM::BLr9_pred: newOpc = ARM::BL_pred; break;
case ARM::BLXr9: newOpc = ARM::BLX; break;
case ARM::BLXr9_pred: newOpc = ARM::BLX_pred; break;
}
MCInst TmpInst;
LowerARMMachineInstrToMCInst(MI, TmpInst, *this);
TmpInst.setOpcode(newOpc);
OutStreamer.EmitInstruction(TmpInst);
return;
}
case ARM::BXr9_CALL:
case ARM::BX_CALL: {
{

25
lib/Target/ARM/ARMInstrInfo.td
View File

@ -1429,24 +1429,29 @@ let isCall = 1,
// moved above / below calls.
Defs = [R0, R1, R2, R3, R9, R12, LR, QQQQ0, QQQQ2, QQQQ3, CPSR, FPSCR],
Uses = [R7, SP] in {
def BLr9 : ARMPseudoInst<(outs), (ins bltarget:$func, variable_ops),
def BLr9 : ARMPseudoExpand<(outs), (ins bl_target:$func, variable_ops),
Size4Bytes, IIC_Br,
[(ARMcall tglobaladdr:$func)]>, Requires<[IsARM, IsDarwin]>;
[(ARMcall tglobaladdr:$func)], (BL bl_target:$func)>,
Requires<[IsARM, IsDarwin]>;
def BLr9_pred : ARMPseudoInst<(outs),
(ins bltarget:$func, pred:$p, variable_ops),
def BLr9_pred : ARMPseudoExpand<(outs),
(ins bl_target:$func, pred:$p, variable_ops),
Size4Bytes, IIC_Br,
[(ARMcall_pred tglobaladdr:$func)]>,
[(ARMcall_pred tglobaladdr:$func)],
(BL_pred bl_target:$func, pred:$p)>,
Requires<[IsARM, IsDarwin]>;
// ARMv5T and above
def BLXr9 : ARMPseudoInst<(outs), (ins GPR:$func, variable_ops),
def BLXr9 : ARMPseudoExpand<(outs), (ins GPR:$func, variable_ops),
Size4Bytes, IIC_Br,
[(ARMcall GPR:$func)]>, Requires<[IsARM, HasV5T, IsDarwin]>;
[(ARMcall GPR:$func)],
(BLX GPR:$func)>,
Requires<[IsARM, HasV5T, IsDarwin]>;
def BLXr9_pred: ARMPseudoInst<(outs), (ins GPR:$func, pred:$p, variable_ops),
Size4Bytes, IIC_Br,
[(ARMcall_pred GPR:$func)]>,
def BLXr9_pred: ARMPseudoExpand<(outs), (ins GPR:$func, pred:$p,variable_ops),
Size4Bytes, IIC_Br,
[(ARMcall_pred GPR:$func)],
(BLX_pred GPR:$func, pred:$p)>,
Requires<[IsARM, HasV5T, IsDarwin]>;
// ARMv4T