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Give each MCCFIInstruction its own opcode.
This untangles the switch cases of the old Move and RelMove opcodes a bit and makes it clear how to add new instructions. llvm-svn: 168534
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@ -266,8 +266,9 @@ namespace llvm {
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class MCCFIInstruction {
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public:
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enum OpType { SameValue, RememberState, RestoreState, Move, RelMove, Escape,
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Restore, Undefined };
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enum OpType { OpSameValue, OpRememberState, OpRestoreState, OpOffset,
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OpDefCfaRegister, OpDefCfaOffset, OpDefCfa, OpRelOffset,
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OpAdjustCfaOffset, OpEscape, OpRestore, OpUndefined };
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private:
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OpType Operation;
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MCSymbol *Label;
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@ -283,11 +284,10 @@ namespace llvm {
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public:
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static MCCFIInstruction
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createCFIOffset(MCSymbol *L, unsigned Register, int Offset) {
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createOffset(MCSymbol *L, unsigned Register, int Offset) {
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MachineLocation Dest(Register, Offset);
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MachineLocation Source(Register, Offset);
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MCCFIInstruction Ret(Move, L, Dest, Source, "");
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MCCFIInstruction Ret(OpOffset, L, Dest, Source, "");
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return Ret;
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}
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@ -295,14 +295,14 @@ namespace llvm {
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createDefCfaRegister(MCSymbol *L, unsigned Register) {
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MachineLocation Dest(Register);
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MachineLocation Source(MachineLocation::VirtualFP);
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MCCFIInstruction Ret(Move, L, Dest, Source, "");
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MCCFIInstruction Ret(OpDefCfaRegister, L, Dest, Source, "");
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return Ret;
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}
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static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset) {
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MachineLocation Dest(MachineLocation::VirtualFP);
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MachineLocation Source(MachineLocation::VirtualFP, -Offset);
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MCCFIInstruction Ret(Move, L, Dest, Source, "");
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MCCFIInstruction Ret(OpDefCfaOffset, L, Dest, Source, "");
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return Ret;
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}
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@ -310,40 +310,40 @@ namespace llvm {
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createDefCfa(MCSymbol *L, unsigned Register, int Offset) {
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MachineLocation Dest(MachineLocation::VirtualFP);
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MachineLocation Source(Register, -Offset);
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MCCFIInstruction Ret(Move, L, Dest, Source, "");
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MCCFIInstruction Ret(OpDefCfa, L, Dest, Source, "");
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return Ret;
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}
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static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register) {
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MachineLocation Dummy;
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MachineLocation Dest(Register);
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MCCFIInstruction Ret(Undefined, L, Dest, Dummy, "");
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MCCFIInstruction Ret(OpUndefined, L, Dest, Dummy, "");
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return Ret;
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}
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static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register) {
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MachineLocation Dummy;
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MachineLocation Dest(Register);
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MCCFIInstruction Ret(Restore, L, Dest, Dummy, "");
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MCCFIInstruction Ret(OpRestore, L, Dest, Dummy, "");
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return Ret;
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}
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static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register) {
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MachineLocation Dummy;
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MachineLocation Dest(Register);
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MCCFIInstruction Ret(SameValue, L, Dest, Dummy, "");
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MCCFIInstruction Ret(OpSameValue, L, Dest, Dummy, "");
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return Ret;
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}
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static MCCFIInstruction createRestoreState(MCSymbol *L) {
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MachineLocation Dummy;
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MCCFIInstruction Ret(RestoreState, L, Dummy, Dummy, "");
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MCCFIInstruction Ret(OpRestoreState, L, Dummy, Dummy, "");
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return Ret;
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}
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static MCCFIInstruction createRememberState(MCSymbol *L) {
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MachineLocation Dummy;
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MCCFIInstruction Ret(RememberState, L, Dummy, Dummy, "");
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MCCFIInstruction Ret(OpRememberState, L, Dummy, Dummy, "");
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return Ret;
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}
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@ -351,7 +351,7 @@ namespace llvm {
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createRelOffset(MCSymbol *L, unsigned Register, int Offset) {
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MachineLocation Dest(Register, Offset);
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MachineLocation Source(Register, Offset);
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MCCFIInstruction Ret(RelMove, L, Dest, Source, "");
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MCCFIInstruction Ret(OpRelOffset, L, Dest, Source, "");
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return Ret;
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}
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@ -359,13 +359,13 @@ namespace llvm {
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createAdjustCfaOffset(MCSymbol *L, int Adjustment) {
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MachineLocation Dest(MachineLocation::VirtualFP);
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MachineLocation Source(MachineLocation::VirtualFP, Adjustment);
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MCCFIInstruction Ret(RelMove, L, Dest, Source, "");
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MCCFIInstruction Ret(OpAdjustCfaOffset, L, Dest, Source, "");
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return Ret;
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}
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static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals) {
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MachineLocation Dummy;
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MCCFIInstruction Ret(Escape, L, Dummy, Dummy, Vals);
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MCCFIInstruction Ret(OpEscape, L, Dummy, Dummy, Vals);
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return Ret;
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}
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@ -938,7 +938,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
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bool VerboseAsm = Streamer.isVerboseAsm();
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switch (Instr.getOperation()) {
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case MCCFIInstruction::Undefined: {
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case MCCFIInstruction::OpUndefined: {
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unsigned Reg = Instr.getDestination().getReg();
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if (VerboseAsm) {
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Streamer.AddComment("DW_CFA_undefined");
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@ -948,43 +948,68 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
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Streamer.EmitULEB128IntValue(Reg);
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return;
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}
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case MCCFIInstruction::Move:
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case MCCFIInstruction::RelMove: {
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case MCCFIInstruction::OpAdjustCfaOffset:
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case MCCFIInstruction::OpDefCfaOffset: {
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const MachineLocation &Src = Instr.getSource();
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const bool IsRelative =
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Instr.getOperation() == MCCFIInstruction::OpAdjustCfaOffset;
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if (VerboseAsm)
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Streamer.AddComment("DW_CFA_def_cfa_offset");
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Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_offset, 1);
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if (IsRelative)
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CFAOffset += Src.getOffset();
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else
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CFAOffset = -Src.getOffset();
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if (VerboseAsm)
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Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
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Streamer.EmitULEB128IntValue(CFAOffset);
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return;
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}
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case MCCFIInstruction::OpDefCfa: {
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const MachineLocation &Src = Instr.getSource();
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if (VerboseAsm)
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Streamer.AddComment("DW_CFA_def_cfa");
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Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa, 1);
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if (VerboseAsm)
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Streamer.AddComment(Twine("Reg ") + Twine(Src.getReg()));
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Streamer.EmitULEB128IntValue(Src.getReg());
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CFAOffset = -Src.getOffset();
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if (VerboseAsm)
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Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
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Streamer.EmitULEB128IntValue(CFAOffset);
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return;
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}
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case MCCFIInstruction::OpDefCfaRegister: {
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const MachineLocation &Dst = Instr.getDestination();
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assert(Dst.isReg() && "Machine move not supported yet.");
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if (VerboseAsm)
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Streamer.AddComment("DW_CFA_def_cfa_register");
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Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_register, 1);
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if (VerboseAsm)
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Streamer.AddComment(Twine("Reg ") + Twine(Dst.getReg()));
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Streamer.EmitULEB128IntValue(Dst.getReg());
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return;
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}
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case MCCFIInstruction::OpOffset:
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case MCCFIInstruction::OpRelOffset: {
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const MachineLocation &Dst = Instr.getDestination();
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const MachineLocation &Src = Instr.getSource();
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const bool IsRelative = Instr.getOperation() == MCCFIInstruction::RelMove;
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// If advancing cfa.
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if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
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if (Src.getReg() == MachineLocation::VirtualFP) {
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if (VerboseAsm) Streamer.AddComment("DW_CFA_def_cfa_offset");
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Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_offset, 1);
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} else {
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if (VerboseAsm) Streamer.AddComment("DW_CFA_def_cfa");
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Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa, 1);
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if (VerboseAsm) Streamer.AddComment(Twine("Reg ") +
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Twine(Src.getReg()));
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Streamer.EmitULEB128IntValue(Src.getReg());
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}
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if (IsRelative)
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CFAOffset += Src.getOffset();
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else
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CFAOffset = -Src.getOffset();
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if (VerboseAsm) Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
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Streamer.EmitULEB128IntValue(CFAOffset);
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return;
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}
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if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
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assert(Dst.isReg() && "Machine move not supported yet.");
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if (VerboseAsm) Streamer.AddComment("DW_CFA_def_cfa_register");
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Streamer.EmitIntValue(dwarf::DW_CFA_def_cfa_register, 1);
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if (VerboseAsm) Streamer.AddComment(Twine("Reg ") + Twine(Dst.getReg()));
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Streamer.EmitULEB128IntValue(Dst.getReg());
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return;
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}
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const bool IsRelative =
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Instr.getOperation() == MCCFIInstruction::OpRelOffset;
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unsigned Reg = Src.getReg();
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int Offset = Dst.getOffset();
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@ -1015,15 +1040,15 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
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}
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return;
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}
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case MCCFIInstruction::RememberState:
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case MCCFIInstruction::OpRememberState:
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if (VerboseAsm) Streamer.AddComment("DW_CFA_remember_state");
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Streamer.EmitIntValue(dwarf::DW_CFA_remember_state, 1);
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return;
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case MCCFIInstruction::RestoreState:
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case MCCFIInstruction::OpRestoreState:
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if (VerboseAsm) Streamer.AddComment("DW_CFA_restore_state");
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Streamer.EmitIntValue(dwarf::DW_CFA_restore_state, 1);
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return;
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case MCCFIInstruction::SameValue: {
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case MCCFIInstruction::OpSameValue: {
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unsigned Reg = Instr.getDestination().getReg();
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if (VerboseAsm) Streamer.AddComment("DW_CFA_same_value");
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Streamer.EmitIntValue(dwarf::DW_CFA_same_value, 1);
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@ -1031,7 +1056,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
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Streamer.EmitULEB128IntValue(Reg);
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return;
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}
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case MCCFIInstruction::Restore: {
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case MCCFIInstruction::OpRestore: {
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unsigned Reg = Instr.getDestination().getReg();
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if (VerboseAsm) {
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Streamer.AddComment("DW_CFA_restore");
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@ -1040,7 +1065,7 @@ void FrameEmitterImpl::EmitCFIInstruction(MCStreamer &Streamer,
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Streamer.EmitIntValue(dwarf::DW_CFA_restore | Reg, 1);
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return;
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}
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case MCCFIInstruction::Escape:
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case MCCFIInstruction::OpEscape:
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if (VerboseAsm) Streamer.AddComment("Escape bytes");
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Streamer.EmitBytes(Instr.getValues(), 0);
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return;
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@ -1276,7 +1301,7 @@ const MCSymbol &FrameEmitterImpl::EmitCIE(MCStreamer &streamer,
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unsigned Reg = Src.getReg();
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int Offset = Dst.getOffset();
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MCCFIInstruction Inst =
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MCCFIInstruction::createCFIOffset(Label, Reg, Offset);
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MCCFIInstruction::createOffset(Label, Reg, Offset);
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Instructions.push_back(Inst);
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}
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}
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@ -276,7 +276,7 @@ void MCStreamer::EmitCFIDefCfaRegister(int64_t Register) {
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void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) {
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MCSymbol *Label = EmitCFICommon();
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MCCFIInstruction Instruction =
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MCCFIInstruction::createCFIOffset(Label, Register, Offset);
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MCCFIInstruction::createOffset(Label, Register, Offset);
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MCDwarfFrameInfo *CurFrame = getCurrentFrameInfo();
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CurFrame->Instructions.push_back(Instruction);
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}
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