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[InstCombine] allow icmp (and X, C2), C1 folds for splat constant vectors
This is a revert of r280676 which was a revert of r280637; ie, this is r280637 again. It was speculatively reverted to help debug buildbot failures. llvm-svn: 280861
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@ -1532,60 +1532,50 @@ Instruction *InstCombiner::foldICmpAndConstConst(ICmpInst &Cmp,
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if (Instruction *I = foldICmpAndShift(Cmp, And, C1))
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if (Instruction *I = foldICmpAndShift(Cmp, And, C1))
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return I;
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return I;
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// FIXME: This check restricts all folds under here to scalar types.
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ConstantInt *RHS = dyn_cast<ConstantInt>(Cmp.getOperand(1));
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if (!RHS)
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return nullptr;
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// (icmp pred (and (or (lshr A, B), A), 1), 0) -->
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// (icmp pred (and (or (lshr A, B), A), 1), 0) -->
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// (icmp pred (and A, (or (shl 1, B), 1), 0))
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// (icmp pred (and A, (or (shl 1, B), 1), 0))
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//
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//
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// iff pred isn't signed
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// iff pred isn't signed
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{
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if (!Cmp.isSigned() && *C1 == 0 && match(And->getOperand(1), m_One())) {
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Constant *One = cast<Constant>(And->getOperand(1));
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Value *Or = And->getOperand(0);
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Value *A, *B, *LShr;
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Value *A, *B, *LShr;
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if (!Cmp.isSigned() && *C1 == 0) {
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if (match(Or, m_Or(m_Value(LShr), m_Value(A))) &&
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if (match(And->getOperand(1), m_One())) {
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match(LShr, m_LShr(m_Specific(A), m_Value(B)))) {
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Constant *One = cast<Constant>(And->getOperand(1));
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unsigned UsesRemoved = 0;
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Value *Or = And->getOperand(0);
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if (And->hasOneUse())
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if (match(Or, m_Or(m_Value(LShr), m_Value(A))) &&
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++UsesRemoved;
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match(LShr, m_LShr(m_Specific(A), m_Value(B)))) {
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if (Or->hasOneUse())
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unsigned UsesRemoved = 0;
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++UsesRemoved;
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if (And->hasOneUse())
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if (LShr->hasOneUse())
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++UsesRemoved;
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++UsesRemoved;
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if (Or->hasOneUse())
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++UsesRemoved;
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// Compute A & ((1 << B) | 1)
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if (LShr->hasOneUse())
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Value *NewOr = nullptr;
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++UsesRemoved;
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if (auto *C = dyn_cast<Constant>(B)) {
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Value *NewOr = nullptr;
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if (UsesRemoved >= 1)
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// Compute A & ((1 << B) | 1)
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NewOr = ConstantExpr::getOr(ConstantExpr::getNUWShl(One, C), One);
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if (auto *C = dyn_cast<Constant>(B)) {
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} else {
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if (UsesRemoved >= 1)
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if (UsesRemoved >= 3)
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NewOr = ConstantExpr::getOr(ConstantExpr::getNUWShl(One, C), One);
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NewOr = Builder->CreateOr(Builder->CreateShl(One, B, LShr->getName(),
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} else {
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if (UsesRemoved >= 3)
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NewOr =
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Builder->CreateOr(Builder->CreateShl(One, B, LShr->getName(),
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/*HasNUW=*/true),
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/*HasNUW=*/true),
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One, Or->getName());
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One, Or->getName());
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}
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}
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if (NewOr) {
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if (NewOr) {
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Value *NewAnd = Builder->CreateAnd(A, NewOr, And->getName());
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Value *NewAnd = Builder->CreateAnd(A, NewOr, And->getName());
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Cmp.setOperand(0, NewAnd);
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Cmp.setOperand(0, NewAnd);
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return &Cmp;
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return &Cmp;
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}
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}
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}
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}
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}
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}
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}
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}
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// Replace ((X & C2) > C1) with ((X & C2) != 0), if any bit set in (X & C2)
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// (X & C2) > C1 --> (X & C2) != 0, if any bit set in (X & C2) will produce a
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// will produce a result greater than C1.
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// result greater than C1.
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if (Cmp.getPredicate() == ICmpInst::ICMP_UGT) {
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unsigned NumTZ = C2->countTrailingZeros();
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unsigned NTZ = C2->countTrailingZeros();
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if (Cmp.getPredicate() == ICmpInst::ICMP_UGT && NumTZ < C2->getBitWidth() &&
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if ((NTZ < C2->getBitWidth()) &&
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APInt::getOneBitSet(C2->getBitWidth(), NumTZ).ugt(*C1)) {
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APInt::getOneBitSet(C2->getBitWidth(), NTZ).ugt(*C1))
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Constant *Zero = Constant::getNullValue(And->getType());
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return new ICmpInst(ICmpInst::ICMP_NE, And,
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return new ICmpInst(ICmpInst::ICMP_NE, And, Zero);
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Constant::getNullValue(RHS->getType()));
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}
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}
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return nullptr;
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return nullptr;
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@ -1013,15 +1013,29 @@ define i1 @test67(i32 %x) {
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ret i1 %cmp
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ret i1 %cmp
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}
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}
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; FIXME: Vectors should fold the same way.
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; The test above relies on 3 different folds.
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; This test only checks the last of those (icmp ugt -> icmp ne).
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define <2 x i1> @test67vec(<2 x i32> %x) {
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define <2 x i1> @test67vec(<2 x i32> %x) {
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; CHECK-LABEL: @test67vec(
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; CHECK-LABEL: @test67vec(
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, <i32 96, i32 96>
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; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%and = and <2 x i32> %x, <i32 96, i32 96>
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%cmp = icmp ugt <2 x i32> %and, <i32 31, i32 31>
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ret <2 x i1> %cmp
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}
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; FIXME: Vector constant for the 'and' should use less bits.
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define <2 x i1> @test67vec2(<2 x i32> %x) {
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; CHECK-LABEL: @test67vec2(
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, <i32 127, i32 127>
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %x, <i32 127, i32 127>
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[AND]], <i32 31, i32 31>
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[AND]], <i32 31, i32 31>
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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;
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%and = and <2 x i32> %x, <i32 127, i32 127>
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%and = and <2 x i32> %x, <i32 127, i32 127>
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%cmp = icmp sgt <2 x i32> %and, <i32 31, i32 31>
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%cmp = icmp ugt <2 x i32> %and, <i32 31, i32 31>
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ret <2 x i1> %cmp
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ret <2 x i1> %cmp
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}
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}
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@ -2059,13 +2073,12 @@ define i1 @icmp_and_or_lshr(i32 %x, i32 %y) {
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ret i1 %ret
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ret i1 %ret
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}
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}
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; FIXME: Vectors should fold the same way.
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define <2 x i1> @icmp_and_or_lshr_vec(<2 x i32> %x, <2 x i32> %y) {
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define <2 x i1> @icmp_and_or_lshr_vec(<2 x i32> %x, <2 x i32> %y) {
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; CHECK-LABEL: @icmp_and_or_lshr_vec(
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; CHECK-LABEL: @icmp_and_or_lshr_vec(
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; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> %x, %y
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; CHECK-NEXT: [[SHF1:%.*]] = shl nuw <2 x i32> <i32 1, i32 1>, %y
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHF]], %x
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; CHECK-NEXT: [[OR2:%.*]] = or <2 x i32> [[SHF1]], <i32 1, i32 1>
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[OR]], <i32 1, i32 1>
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; CHECK-NEXT: [[AND3:%.*]] = and <2 x i32> [[OR2]], %x
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; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
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; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND3]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[RET]]
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; CHECK-NEXT: ret <2 x i1> [[RET]]
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;
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;
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%shf = lshr <2 x i32> %x, %y
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%shf = lshr <2 x i32> %x, %y
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@ -2088,13 +2101,10 @@ define i1 @icmp_and_or_lshr_cst(i32 %x) {
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ret i1 %ret
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ret i1 %ret
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}
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}
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; FIXME: Vectors should fold the same way.
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define <2 x i1> @icmp_and_or_lshr_cst_vec(<2 x i32> %x) {
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define <2 x i1> @icmp_and_or_lshr_cst_vec(<2 x i32> %x) {
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; CHECK-LABEL: @icmp_and_or_lshr_cst_vec(
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; CHECK-LABEL: @icmp_and_or_lshr_cst_vec(
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; CHECK-NEXT: [[SHF:%.*]] = lshr <2 x i32> %x, <i32 1, i32 1>
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; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> %x, <i32 3, i32 3>
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHF]], %x
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; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND1]], zeroinitializer
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[OR]], <i32 1, i32 1>
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; CHECK-NEXT: [[RET:%.*]] = icmp ne <2 x i32> [[AND]], zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[RET]]
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; CHECK-NEXT: ret <2 x i1> [[RET]]
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;
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;
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%shf = lshr <2 x i32> %x, <i32 1, i32 1>
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%shf = lshr <2 x i32> %x, <i32 1, i32 1>
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