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[MIPS] Fix illegal type assert in single-float mode

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An fp_to_sint node would be incorrectly lowered to a TruncIntFP node in
single-float mode. This would trigger an "Unexpected illegal type!"
assert.

Patch by Dan Ravensloft.

Differential revision: https://reviews.llvm.org/D51810

llvm-svn: 341952
This commit is contained in:
Simon Atanasyan 2018-09-11 15:32:47 +00:00
parent 144681bec9
commit 02feb4f599
2 changed files with 60 additions and 3 deletions
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11
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -2563,10 +2563,12 @@ static SDValue lowerUnalignedIntStore(StoreSDNode *SD, SelectionDAG &DAG,
}
// Lower (store (fp_to_sint $fp) $ptr) to (store (TruncIntFP $fp), $ptr).
static SDValue lowerFP_TO_SINT_STORE(StoreSDNode *SD, SelectionDAG &DAG) {
static SDValue lowerFP_TO_SINT_STORE(StoreSDNode *SD, SelectionDAG &DAG,
bool SingleFloat) {
SDValue Val = SD->getValue();
if (Val.getOpcode() != ISD::FP_TO_SINT)
if (Val.getOpcode() != ISD::FP_TO_SINT ||
(Val.getValueSizeInBits() > 32 && SingleFloat))
return SDValue();
EVT FPTy = EVT::getFloatingPointVT(Val.getValueSizeInBits());
@ -2587,7 +2589,7 @@ SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const {
((MemVT == MVT::i32) || (MemVT == MVT::i64)))
return lowerUnalignedIntStore(SD, DAG, Subtarget.isLittle());
return lowerFP_TO_SINT_STORE(SD, DAG);
return lowerFP_TO_SINT_STORE(SD, DAG, Subtarget.isSingleFloat());
}
SDValue MipsTargetLowering::lowerEH_DWARF_CFA(SDValue Op,
@ -2603,6 +2605,9 @@ SDValue MipsTargetLowering::lowerEH_DWARF_CFA(SDValue Op,
SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op,
SelectionDAG &DAG) const {
if (Op.getValueSizeInBits() > 32 && Subtarget.isSingleFloat())
return SDValue();
EVT FPTy = EVT::getFloatingPointVT(Op.getValueSizeInBits());
SDValue Trunc = DAG.getNode(MipsISD::TruncIntFP, SDLoc(Op), FPTy,
Op.getOperand(0));

52
test/CodeGen/Mips/f32-to-i64-single-float.ll Normal file
View File

@ -0,0 +1,52 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=mips64el-mti-linux-gnu -mattr=+single-float < %s | FileCheck %s
; This test casts a 32-bit float to a 64-bit int. This would cause a crash due
; to LLVM incorrectly lowering the float on single-float platforms.
define void @foo(float* %in, i64* %out) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: daddiu $sp, $sp, -16
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: sd $5, 0($sp)
; CHECK-NEXT: sd $4, 8($sp)
; CHECK-NEXT: lwc1 $f0, 0($4)
; CHECK-NEXT: mfc1 $1, $f0
; CHECK-NEXT: lui $2, 32640
; CHECK-NEXT: and $2, $1, $2
; CHECK-NEXT: srl $2, $2, 23
; CHECK-NEXT: lui $3, 127
; CHECK-NEXT: ori $3, $3, 65535
; CHECK-NEXT: addiu $4, $zero, 150
; CHECK-NEXT: subu $4, $4, $2
; CHECK-NEXT: and $3, $1, $3
; CHECK-NEXT: lui $6, 128
; CHECK-NEXT: or $3, $3, $6
; CHECK-NEXT: dsll $3, $3, 32
; CHECK-NEXT: dsrl $3, $3, 32
; CHECK-NEXT: dsrlv $4, $3, $4
; CHECK-NEXT: addiu $6, $2, -150
; CHECK-NEXT: dsllv $3, $3, $6
; CHECK-NEXT: addiu $2, $2, -127
; CHECK-NEXT: slti $6, $2, 24
; CHECK-NEXT: movz $4, $3, $6
; CHECK-NEXT: sra $1, $1, 31
; CHECK-NEXT: xor $3, $4, $1
; CHECK-NEXT: dsubu $1, $3, $1
; CHECK-NEXT: slti $2, $2, 0
; CHECK-NEXT: movn $1, $zero, $2
; CHECK-NEXT: sd $1, 0($5)
; CHECK-NEXT: jr $ra
; CHECK-NEXT: daddiu $sp, $sp, 16
entry:
%in.addr = alloca float*, align 8
%out.addr = alloca i64*, align 8
store float* %in, float** %in.addr, align 8
store i64* %out, i64** %out.addr, align 8
%0 = load float*, float** %in.addr, align 8
%1 = load float, float* %0, align 4
%conv = fptosi float %1 to i64
%2 = load i64*, i64** %out.addr, align 8
store i64 %conv, i64* %2, align 8
ret void
}